Application Notes

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Application Guide to MDI Full-Featured Converters

This application guide offers application information and technical insight on the MDI family of full featured hybrid DC-DC Converters. Hybrid DC-DC Converters offer the advantages of size, weight and performance when compared to discrete or surface mount units. This application note discusses the operation and use of full featured hybrid DC-DC Converters. These parts are currently available in four input voltage ranges. For nominal 28 VDC systems, in order of increasing power levels, the parts are designated Models 2690, 3107, 2680, 3193 and 3031. These parts are also available with "Inhibit Not" as Models 6690, 6107, 6680, 6193 and 6031. For nominal 120 VDC systems, in order of increasing power levels, the parts are designated Models 3070, 3108, 3060, 3326 and 3051. For nominal 270 VDC systems, in order of increasing power levels, the parts are designated Models 3020, 3109, 3000, 3327 and 3041. For nominal low voltage 8 to 40 VDC systems, in order of increasing power levels, the full featured parts are designated Models 3062, 3113, 3063 and 3114.

For space applications requiring radiation hardness, MDI offers the proton hard series. For 28 V nominal systems, the parts are designated 5690, 5107, 5680, 5193 and 5031. For 50 V nominal systems, the parts are designated 7690, 7107, 7680, 7193 and 7031. For 70 V nominal systems, the parts are designated 8690, 8107, 8680, 8193 and 8031. For 100 V nominal systems, the parts are designated 9690, 9107, 9680, 9193 and 9031.

The inherent advantages of hybrid switched-mode converters make them a logical solution for use in many applications including spacecraft, aircraft, missiles and undersea systems. Some of these advantages include small size and weight, hermetic sealing for environmental resistance, excellent DC and high frequency isolation, ease in heatsinking the single converter as compared to multiple power components, better control of EMI and output ripple and higher reliability.

The full featured connotation by MDI implies the inclusion of many useful functions that were previously not available in hybrid converters. The most important feature is the addition of a complete self contained EMI filter, allowing these units to meet MIL-STD-461 levels. Additional features include output common mode filtering, programmable soft start, open loop OVP protection, external synchronization inputs and an inhibit input.

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Construction

MDI hybrid DC-DC Converters are completely self contained, hermetically sealed power supplies reconstructed on ceramic thick film substrates. They require no external components for standard operation from power buses. All necessary magnetic components, capacitors and filtering is contained within the hybrid package. The hybrid construction allows the converters to withstand severe environmental requirements. All magnetic components within the hybrid are constructed in toroidal form. Since the windings are on the outside, the toroidal construction results in better heatsinking of the magnetic components than possible with ferrite cored magnetics. The resistors are primarily printed directly on the thick film substrate, with certain key resistors as separate chips.

The active components are principally bipolar, excepting the switching FET. This allows the same circuit topology and layout to be used for both non-Rad Hard and Rad Hard uses, depending on actual part types used.

A wide variety of cases is offered in both PC mount and chassis mount configurations. Choices of solder sealed and seam welded packaging are also offered.

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Features and Specifications

MDI full featured hybrid DC-DC Converters use a flyback topology operating at approximately 200 kHz or 300kHz. The flyback topology is especially well suited for a wide input voltage range and for multiple output voltages. The converters operate over an input voltage range from 5:1 (for the low voltage series) to a range of 1.67:1 (for the 270 V series). The range for the standard 28 VDC parts encompasses the limits of MIL-STD-704A. The "V" series parts of the 28 VDC range can survive the 100 VDC surges of MIL-STD-1275. Standard input to case isolation is 500 VDC for all ranges. Standard output to case isolation is 100 VDC. Standard input to output isolation is 500 VDC. All full featured units combine not only input MIL-STD-461 EMI filters, but also output common mode filters for spike suppression.

The hybrids have circuit features such as current limiting on each output, a programmable power on soft start, open loop OVP protection, an input inhibit, built-in test status pin and a synchronization input. All input functions except output adjust and remote sense are referenced to the input return.

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DC Power Input Considerations
Turn on Voltage / Load Regulation Effects

At no load conditions at an ambient of 25oC, 28 VDC converters will start to turn on at approximately 11 VDC. The corresponding value for 120 VDC converters is 30-40 VDC. For 270 VDC, the turn on voltage is approximately 80 VDC. For the low voltage 8 to 40 VDC parts, turn on occurs at approximately 9.5 VDC. For 5000 series parts, turn on threshold are the same as other 28 VDC types. For 7000 series parts, turn on occurs at 25 VDC max. For 8000 series parts, turn on occurs at 40 VDC max. For 9000 series parts, turn on occurs at 55 VDC max. There are no constraints on how quickly or how slowly the input voltage is applied. If the input power is applied very slowly (eg., more than several milliseconds), it is recommended that the converter should remain externally inhibited until the power supply input voltage exceeds its minimum rated value. Full regulation at no load can occur at approximately 10 to 20% above the initial start voltage. Between the initial start and reaching the regulation point, the output voltage increases monotonically as the input voltage is increased. External undervoltage lockout circuits are neither necessary nor desirable to control turn-on.

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Steady State Input Range

The 28 VDC input converters were nominally designed to operate from the normal steady state range of MIL-STD-704A through E, but operate over the extended range of 16 to 50 VDC. A surge resistance of 80 VDC is standard for the 28 VDC parts. "V" rated units can withstand the 100 VDC surge of MIL-STD-1275.

The 120 VDC input converters were nominally designed to operate from the normal steady state range of Space Station power, and operate over the extended range of 86 to 158 VDC.

The 270 VDC input converters were nominally designed to operate from the normal steady state range of MIL-STD-704D and E, but operate over the extended steady state range of 200 to 335 VDC. A surge resistance of 440 VDC is standard for the 270 VDC parts.

The 8 to 40 VDC input converters are designed for special low voltage applications, such as low voltage satellite buses. They are not designed to operate from MIL-STD-704 without external limiting circuitry. Surge resistance over 40 VDC is not specified.

For 28 VDC input, the minimum full load output voltage requires an 18 VDC input (due to optimum transformer turns ratios), but operate down to 16 VDC at slightly lighter loads. For converters with an adjustable output voltage or remote sense, a higher output voltage or remote sense voltage recovery will also increase the minimum DC input voltage at full load. Units that operate at lower voltage are available on special order.

Hot and cold temperature extremes can also increase the minimum full load regulation point by several percent due to higher saturation drops or higher voltage.

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Reverse Input Polarity

The DC-DC Converters are not internally protected against application of reverse polarity. However, if reverse polarity is applied to the input pins, the shunt body diode of the switching FET will conduct. The current rating of the FET shunt body is approximately 1 Ampere for the smaller converters ranging upward to 10 Amperes for the 80 watt parts. The input control circuits are protected against reverse polarity by a series rectifier. The input capacitors are non-polarized. If an external rectifier is used in series with the DC input lines, care must be taken to avoid peak detection of the input capacitors when external spikes such as CS06 waveforms are applied. This can happen with low power units operating with a light load. In this case, the voltage on the input filter capacitors can stairstep up to destructive levels.

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Input Spikes and Surges

Virtually every use of a DC-DC Converter that operates from vehicle power (including spacecraft, aircraft, missiles, ground vehicles and marine applications) is subjected to surges in input voltage and voltage spikes of one sort or another. Surges are voltage increases that are of relatively long duration from sources with relatively low source impedance. Spikes are of much shorter duration, have higher amplitude than surges, may be of either polarity and are usually limited in energy.

Older style hybrid DC-DC Converters have neglected the spike and surge issue entirely, limiting the input voltage to an absolute maximum value. This leaves the entire job of protecting the unit from failing due to spikes and surges to the customer, who is usually not happy about having this assignment. Separate surge suppressing modules using linear pass stages are available, but are generally not reliable, cost effective or electrically efficient. EMI filter modules containing spike suppressing shunt zener diodes are also available from several vendors. These parts address the spike issue, but generally ignore the concomitant surge requirement.

The ideal solution to the spike and surge problem is found in the MDI full featured DC-DC Converters, which have built in spike and surge resistance that allows them to operate directly from the vehicle power. This systems approach offers the customer a single solution to the system compatibility problem.

Spikes and surges are governed by several sometimes conflicting specifications. One group of specifications limits the magnitude of the disturbance that a power using device may cause on the power bus. A second group of specifications mandates the size of disturbances that a power using device must ignore while still performing its requirement. There is normally a guardband between the effects (or emissions) that a power using device generates and the amount of effect that will not upset it (or resistance to susceptibility).

In some instances, such as MIL-STD-461, both groups of requirements are contained within the same document.

In aircraft applications, the most common power requirement is MIL-STD-704, which has revisions A through E. Revisions A and C are most severe, with 28 VDC nominal systems experiencing 80 VDC surges for up to 50 milliseconds. The applicable revision depends on the vintage of the aircraft's electrical system. The corresponding requirement for commercial aircraft is RTCA D0160. Other specifications exist for unique requirements.

For ground vehicle requirements, the most commonly used specification is MIL-STD-1275. This 28 VDC nominal specification imposes 100 VDC surges for up to 100 milliseconds.

Spacecraft and missile applications tend to have small electrical systems, so the spike and surge requirements are generally unique for each application. However, missiles that are launched from an aircraft or ground vehicle may have a combination of requirements.

Spike amplitudes and durations are governed by numerous specifications. MIL-STD-461C has a CS06 spike test. MIL-STD-461D has an equivalent spike test via cable bundling. Other specifications with input spike requirements are MIL-STD-704, DO160, MIL-STD-1275, MIL-STD-1399 and MIL-E-6051.

The differing nature of surges versus spikes leads to different approaches to living with them. For example, the time duration of the typical surge requirement is quite long compared to the energy storage capability in an input filter. This implies that the basic DC-DC Converter circuitry, not only the input filter, must be able to withstand the applied voltage. The full featured parts are designed to operate through the surge conditions, which is a conservative design approach that offers the highest reliability in system applications. The price paid for such wide operating ranges is a slight fall off in efficiency due to the use of higher voltage semiconductors.

Spike suppression is generally easier than surge suppression since the time durations are much shorter. Input spike suppression within the full featured parts relies on the EMI filter components to spread the energy without loss within the spike to a waveform of lower amplitude and longer time duration.

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Conducted Susceptibility and Spike Effects

Conducted susceptibility is a test method that applies an AC modulation superimposed on the DC-DC Converter's power input leads. It corresponds to method CS01 and CS02 of MIL-STD-461C and CS101 of MIL-STD-461D. CS01 extends from 30 Hz to 50 kHz, so is called audio frequency susceptibility.

All testing for conducted susceptibility is normally done at nominal full load conditions. For the CS01 test, an audio signal of 2.8 volts RMS (8.2 volts peak to peak) is superimposed on the input 28 VDC. From 1.5 kHz to 50 kHz, the amplitude decreases linearly. In addition, the power of the susceptibility source is limited to 50 watts.

For the 120 VDC series of converters, the conducted susceptibility level is 5 volts RMS superimposed on a nominal 120 VDC level, in accordance with SSP30237. For the 270 VDC converters, the test voltage is 10 V RMS. The 8 to 40 VDC units are tested with a conducted susceptibility voltage of 1 volt RMS superimposed on a 14 VDC level.

For 5000 series parts, the CS01 voltage is 1Vp-p and the parts are tested at 28 VDC For 7000 series parts, the CS01 voltage is 1Vp-p and the parts are tested at 50 VDC For 8000 series parts, the CS01 voltage is 2Vp-p and the parts are tested at 70 VDC For 9000 series parts, the CS01 voltage is 2V p-p and the parts are tested at 100 VDC.

Applying the audio susceptibility signal causes the DC-DC Converter's output to be modulated at the audio frequency. Thus, the output of the DC-DC Converter has the normal high frequency ripple with the audio superimposed. Standard MDI pass/fail criteria for CS01 testing is that the envelope of the peak to peak output modulation not exceed the specified peak to peak ripple specification. Therefore, the maximum allowable output deviation with a conducted susceptibility input is twice the allowable peak to peak ripple.

The MDI full featured DC-DC Converters have excellent rejection of conducted susceptibility due to their current mode inner loop. The basic converter has a loop gain of greater than 50 dB. The typical EMI resonance is in the 5 kHz to 10 kHz area, where a peaking of approximately 10-12 dB can occur. This peaking amplifies the conducted susceptibility, so it subtracts from the basic audio rejection of the converter. Beyond this point, the filter adds attenuation.

In MDI's standard triple output converters, one output (usually 5 VDC) is the main regulated output. Only the main regulated output will exhibit conducted susceptibility effects. The other two outputs are linear regulated. In this event, there is virtually no discernible effect on the linear regulated outputs arising from the conducted susceptibility. The reason for this is the additional voltage rejection of the linear regulator itself.

CS02 testing extends the conducted susceptibility range from 50 kHz up through the low UHF region. The injection methods of CS02 are different from CS01 injection because of the frequency range. The coupling method allows the use of standard 50 ohm impedance RF generators and amplifiers.

Due to highly effective input filter response in this frequency range, it is unusual to detect any change in DC-DC Converter performance when this test is performed. Because the power return leg is at RF ground, the CS02 test should be performed on the positive power lead only.

Spikes impressed on the power input leads of the full featured DC-DC Converters are principally attenuated by the input EMI filter. The filter losslessly transforms the shape of narrow spike waveforms into a lower amplitude damped sinusoid at the input EMI filter's resonant frequency. A ± 5% output voltage deviation is allowed for the converters full featured DC-DC Converters when the CS06 or equivalent spike waveform is applied.

MIL-STD-461D, E, F and G Conducted Susceptibility CS114, CS115 and CS116

The CS06 spike test of MIL-STD-461C was replaced by methods CS114, CS115 and CS116 of MIL-STD-461D, E, F and G.

In method CS06, narrow spikes are directly connected to the DC-DC Converter power inputs. In contrast, sine waves (method CS114), narrow pulse (CS115) or damped sinusoids (CS116) are coupled into the representative power cables that feed the DC-DC Converter.

Because MIL-STD-461D, E, F and G are based on signal injection to the entire unit (of which the DC-DC Converter is only a part), these tests are fundamentally different than the CS06 test. The CS114, 115 and 116 inputs generate conducted susceptibility on the power input lines, but also have the potential to generate noise on other wiring external to the DC-DC Converter.

In the MDI DC-DC Converters, there are power inputs, power outputs and control pins.

Depending on the arrangement of the unit and the internal and external cables ultimately connecting to the MDI DC-DC Converter, no upset or significant degradation of performance should be expected, since the extensive multi-stage input LC filter and low ESR output capacitors within the MDI DC-DC Converter substantially attenuate the susceptibility effects.

However, care should be taken by the user in layout, decoupling and connection to the control pins, including the BIT, inhibit, sync and adjust pins, since these pins have less filtering than the inputs and outputs.

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EMI Filter Characteristics

The MDI full featured DC-DC Converters incorporate an integral input EMI filter that reduces the conducted emissions below the level of CE03 of MIL-STD-461C. The EMI filter also attenuates the effects of input CS06 spikes and CS01/CS02 conducted susceptibility. It is a very challenging task to construct an EMI filter of very small dimensions and it is also difficult when the filter is located very close to the noise source. MDI has overcome these challenges in the design of the full featured DC-DC Converters.

The filter consists of elements that block the conducted emissions from the power leads. In addition, the filter has elements that provide low impedance shunt paths for unwanted current. The general filter schematic is shown in Figure 1. The output common mode filter is a most important adjunct to the input filter. Without the output common mode filter, uncontrolled conducted emissions will exit from the output leads of the converter. Some portion will flow back through chassis grounds and appear on the input leads.

Within the DC-DC Converter, conducted emissions can be differential mode or common mode. Differential mode emissions appear primarily on one input power lead, whereas common mode emissions appear on both because of the nature of the sources that generate the emissions, differential noise is more common below 1-2 MHz, where common mode noise is more prevalent at higher frequencies.

The input EMI filter in MDI's full featured converters is constructed with three inductive and three capacitive elements. A common mode inductor, or balun is connected to the input pins. This two winding inductor has a low differential inductance, but a high inductance for common mode currents. Following the common mode inductor are two LC "L" section differential filters. At the output of the final "L" section, there is a shunt capacitor to the hybrid case.

The common mode filter thus consists of the input common mode inductor and the shunt capacitor to the case. The differential mode filter consists of the two "L" sections.

Because of close proximity to switching noise sources, each of the differential filters have two windings, not one. Half the winding is placed in the positive power leg, half in the negative leg. By splitting the winding into two sections, radiated noise that would otherwise couple into the inductor is cancelled out.

The consequence of the split winding of the differential EMI filters is that the negative power return is not at the same AC potential as the return of all the input side connections. This mandates the need for care in using the input side pins so as to not upset the converter during dynamic transient events that cause a voltage drop across the negative leg of the input filter. Circuit techniques that are recommended for overcoming this fact are discussed when the control pins are reviewed.

The input EMI filter has a resonant rise of approximately 10-15 dB at a typical resonant frequency between 5 kHz and 10 kHz. 40 watt and 80 watt DC-DC Converters incorporate a damping network to reduce the magnitude of the resonant rise.

MIL-STD-461D, E, F and G

MIL-STD-461 D, E, F and G differs from MIL-STD-461C in many ways. However, as it relates to DC-DC Converters, the principal difference relates to the way conducted emissions are measured and also the limits for conducted emissions.

MIL-STD-461C uses a current measurement of EMI. The DC-DC Converters power inputs are connected to the power source through 10 microfarad feedthrough capacitors, and the current emissions are sampled by a current probe. The units of emission are dB above a microampere.

Conversely, in MIL-STD-461 D, E, F and G, the DC-DC Converter inputs are connected to the power source through LISN's (Line Impedance Stabilization Network) and emissions are measured by the voltage dropped across a 50 ohm resistor. The units of emission are dB above a microvolt.

The EMI filter design is different, depending on the type of measurement specified. Since MIL-STD-461C is measured by the current flowing into the 10 microfarad test feedthrough capacitor, the EMI filter works best with an input inductor. Conversely, with MIL-STD-461D, E, F and G, the EMI filter works best with an input capacitor.

In addition, because of lower limits at the switching frequencies, a MIL-STD-461D, E, F and G filter requires more attenuation than a MIL-STD-461C filter. In turn, this requires additional filter components.

MDI has developed and plans to incorporate MIL-STD-461D, E, F, G EMI filters in its DC-DC Converter power range, starting with 80 watt parts.

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Input Rise Time and Inrush Current

Input Rise Time and Inrush Current 2000, 3000, 4000, and 6000 Series

There are no practical constraints on how fast or how slow the input voltage can be safely applied to the full featured DC-DC Converters. The typical input current as a function of time is shown in Figure 2.

There are two peaks in the current waveform. The first peak is due to input EMI filter capacitor charging. The capacitor charging peak current is dependent on the rate of rise of input voltage. Although the inductance and resistance of the input EMI filter limit the initial inrush current to some extent, the small cores in the filter tend to saturate during initial turn-on.

The second peak is due to the converter coming on and supplying the load as well as the internal and external load capacitance.

It can be seen that the initial inrush current due to capacitor charging will be highly dependent on the rate of rise of input voltage. Therefore, to limit inrush current, limit the rise time of the input voltage.

Input Rise Time and Inrush Current 5000, 7000, 8000, and 9000 Series

The 5000, 7000, 8000 and 9000 series Proton Rad Hard DC-DC use a magnetic feedback circuit instead of an optocoupler for feeding back the output side voltage.

Because the response time of the magnetic feedback circuit is different than that of an optocoupler, the output voltage turn on waveform and input current waveform is also different, as shown in the figure below:

There are three peaks in the current waveform. Also, the output voltage is established at a magnitude less than the final set point voltage, then rises to the set point value without any overshoot.

The first input current peak is due to input EMI filter capacitor charging. The capacitor charging peak current is proportional to the rate of rise of input current and proportional to the magnitude of the EMI filter capacitance (as listed in the table). The limiting effect of the EMI filter inductors is negligible because of the inductor’s small sizes. The input EMI filter charging current is usually the largest inrush current and can be controlled by externally limiting the initial rate of rise on input voltage.

The second input current peak is due to the converter initially coming on and supplying sufficient voltage to operate the magnetic feedback circuit. This initial voltage plateau is always less than the desired regulated output voltage. The input current during this portion of the waveform is due to the charging of the internal and external output capacitances as well as the resistive load current at the plateau voltage.

After a delay of 5 to 10 milliseconds, the output voltage exponentially reaches the final regulation set point without any output voltage overshoot.

The third current peak, if any is present, is due to the charging of the internal and external output capacitances to the final set point voltage as well as the resistive load current at the final set point voltage.

The approximate input capacitance of each converter is given in Table 1.

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Efficiency Curves

The efficiency of a DC-DC Converter depends on how the losses compare to the power delivered. In general, of the majority of losses, there are fixed losses that vary directly with power output and losses that vary with the square of output power (I squared R losses).

At Zero output power, the efficiency is always zero, due to the fixed losses. At some point in the output curve, the efficiency may be seen to peak. This is usually at the point where the sum of fixed and direct losses are equal to the square losses. As power is increased past this point, efficiency drops.

Some efficiency curves do not exhibit a peak, but constantly increase up to 100% load. In these cases, the peak efficiency point is greater than 100% output rating.

Representative efficiency curves are presented for 28 VDC nominal parts, 6.5 watt nominal, 30 watt nominal and 80 watt nominal. Curves for other inputs voltages and output powers are similar:

Typical 15 VDC, 5 Watt Efficiency Curve

Typical 5 VDC 6.5 Watt Efficiency Curve

Typical 5 VDC 20 Watt Efficiency Curve

Typical 5 VDC 30 Watt Efficiency Curve

Typical 5 VDC 40 Watt Efficiency Curve

Typical 5 VDC 80 Watt Efficiency Curve

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Output Considerations
Voltage Temperature Coefficients and Setpoints

Voltage Temperature Coefficients

Voltage limits for full featured parts shown in the MDI catalog are the nominal 25°C values. At temperatures outside 25°C, the output voltages may vary with case temperature in the following way:

Main regulated output: +/- 100 PPM/°C maximum
Linear regulated output: +/- 250 PPM/°C maximum
Cross regulated output: +/- 1000 PPM/°C maximum

The main regulated output for single and dual output converters is the output. For a triple output converter, the main regulated output is usually the high current +5 VDC. Different temperature coefficients may be obtained on special order.

Voltage setpoint tolerances are +/-1 percent or +/-100mV whichever is greater at nominal input voltage and full rated load, 25°C.

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Ripple Vs. Temperature

The fundamental output ripple of the full featured converters is dependent on the absolute capacitance value of the output capacitors (when the output capacitors are multi-layer ceramic types), or the ESR of the output capacitors (when the output capacitors are solid tantalum types). The selection of output capacitor depends on the output voltage and type of converter. However, the following effects occur at temperature. For units using ceramic output capacitors, the capacitance falls off sharply at high and low temperature extremes. Although the low ESR of ceramic capacitors results in very low ripple voltages, it is not unusual for ripple voltage to double at the high and low temperature extremes. For units using solid tantalum output capacitors, the ESR rises sharply at low temperature extremes.

Therefore, users should assume a ripple temperature coefficient of 1% per °C increase over the 25°C base numbers.

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Output Pin Voltage Drops

Full featured converters may be regulated at the inside of the output pins, or may be regulated by remote sense in the case of 30, 40 and 80 watt single output low voltage converters.

The output pins are .040" in diameter and have an approximate total length, internal and external, of 0.35". For converters under 80 watts, the pins are made of alloy 52, and have a typical resistance of 1.5 milliohms each. The 80 watt converters use copper cored alloy 52 pins and have a resistance of approximately 0.5 milliohms each.

It can be seen that the drops in the output pins will not be significant except in the case of low voltage/high current outputs.

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Cross Regulation of Dual Outputs

MDI's full featured dual output DC-DC Converters are normally regulated from the positive output to the negative output rail. Therefore, a dual 12 V output unit is actually a 24 V converter with a center tap. A dual 5 VDC unit is actually a 10 VDC unit with a center tap.

Since the voltage from end to end is tightly regulated, the voltage at the tap can and must move if the load is unbalanced. The reason for this is the impedances of the power conversion train and the output filters.

This data for a dual 15 VDC output part shows that the balanced half to full load regulation is 0.14%. Assuming 30 ohms as the per unit load resistance, the DC-DC Converter's per unit output impedance is .0029. The impedance of the center tap is approximately .0114 per unit for small deviations about a fully loaded condition. However, when the load unbalance is severe, the output voltages deviate by a much greater amount. The reason for this is that at heavier loads, more averaging of the power waveform takes place. At light loads, from under 10%, ranging to no load, more peak detecting takes place.

This is why a dual output voltage converter is not recommended for use at lighter than a 90%/10% load unbalance unless a relatively large load unbalance can be tolerated.

In many applications, there is a severe load unbalance, or two outputs of differing voltage are required. In these applications, a conventional dual output part cannot be used.

There are two ways to overcome this situation (that occurs under extreme unbalanced load conditions) by constructing a full featured DC-DC Converter to special order. The first technique is to construct a dual output part made from a triple output design. The high current output is then the sole main regulated output. The lighter current output is derived from one of the linear regulated outputs. The second linear regulated output is not used.

The second technique is to construct a converter that balances output impedances closely to the load unbalance. This includes matching transformer and inductor resistances as well as diode drops, etc., so that the desired voltages are produced regardless of the load unbalance.

MDI full featured hybrid DC-DC Converters with dual output can be produced with the same polarity. For example, a dual output part can be constructed to produce +5 VDC and +3.3 VDC. Another example is a converter that produces +12 VDC and +5 VDC.

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Outputs

The main 5 V output can be loaded with considerable additional capacitance without affecting the stability of the converter. The allowable external capacitance is a function of output power. Safe values are 100 mf for a 6.5 watt unit, 500 mf for a 30 watt unit and 1,000 mf for a 50 or 80 watt unit. For higher external output capacitances consult MDI Applications Engineering Department. For higher voltage or lower voltage outputs, the capacitance is adjusted as the inverse square of the voltage (with 5 VDC as a reference). For triple output units having a main 5 VDC output and linear regulated dual outputs, there are no restrictions on the capacitance that may be used externally on the dual outputs.

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Bandwidth Specifications of Output Ripple

Hybrid DC-DC Converters typically produce a complex output ripple spectrum that extends to 50 MHz or even to 500 MHz. The ripple voltage has two basic aspects. The first is differential voltage, and is the primary component of the lower frequency ripple. The second component is the common mode voltages generated from common mode currents. This component predominates above 2 MHz and is seen on the oscilloscope in the form of spikes.

Noise on converter output leads can also be specified and controlled by EMI specifications and techniques. However, in practice this proves cumbersome because the time domain characteristics are usually more pertinent and easier to visualize than the frequency domain characteristics.

This is why output ripple, noise and spikes are usually specified in terms of peak to peak voltage over a specified bandwidth. In actual practice, reliance on this type of specification can be misleading in several ways. One way is to limit the measurement bandwidth to 1 MHz or 2 MHz while the predominant spike content exceeds this. Virtually all manufacturers of hybrid DC-DC Converters specify output ripple with a 2 MHz bandwidth.

This encompasses the fundamental ripple frequency and several of its harmonics for most units sold today. This excludes the higher frequency, and often higher amplitude, noise content.

A second measurement technique is to make the measurements differentially. Since many hybrid DC-DC Converters are designed with a low ESR output chip capacitor straddling the output pins, differential measurements can produce good test results. When the units are used in a system, the noise output is inexplicably higher, but the difference is due to common mode noise.

The most useful method is to retain the voltage measurement over a meaningful bandwidth but measure it so as to include the output common mode noise since most higher frequency output ripple, noise and spikes are originated as common mode signals.

What is the significance of the distinction between the differential and common mode outputs? The differential ripple and noise can be relatively easy to filter either internally or externally. Common mode noise is relatively more difficult to filter and thus tends to proliferate throughout a system.

Common mode noise is caused by internal EMI currents that flow out through output lines seeking a return path back to the noise source. The best way of suppressing common mode noise is by using common mode filtering at the point closest to the noise source. The ideal location for this common mode filtering is within the hybrid converter itself.

Older generation hybrid DC-DC Converters have very simple filtering systems, often consisting of no more than output capacitors. These types of converters are usually very noisy at frequencies above 2 MHz, particularly in terms of common mode noise.

The latest generation of hybrid DC-DC Converter parts incorporate two advances that dramatically lower output ripple and spikes when compared to earlier generation DC-DC Converters. The first advance is the incorporation of output common mode filter chokes directly within the DC-DC Converter package. The second advance is the incorporation of high capacitance, low ESR ceramic multilayer capacitors in the output stage. These capacitors, which replace solid tantalum types common to older generation DC-DC Converters, provide 1 to 2 decades of improved filtering at high frequency when compared to solid tantalum filters.

Although these noise reduction techniques are not in themselves novel, they represent a radical improvement in performance when they are contained within the shielded enclosure of the hybrid DC-DC Converter.

The result of these two significant technology advances is dramatically reduced output ripple and noise.

Figure 4 shows the functional block diagram of a typical DC-DC Converter hybrid, with integral input and output noise filtering. As this diagram shows, it requires a substantial number of LC elements to control hybrid DC-DC Converter noise. However, by tailoring the elements precisely to the noise spectrum, the small sizes needed to fit within the hybrid converter package may be realized.

On the power input side, the common mode currents are interrupted by a high inductance common mode choke or balun. A shunt capacitor connected to the hybrid case allows the common mode input currents to be localized, instead of flowing out to the input leads. Two stages of LC differential filtering are used to reduce ripple current levels. By using two cascaded higher frequency stages, each stage is physically smaller than a larger, lower frequency single stage.

On the output side, it can be seen again that there is no substitute for filter elements. A common mode choke and shunt capacitor to case completely tame the common mode spikes. A small differential filter adds the final bit of filtering to the output leads. At above approximately 10 MHz, the output filters within the hybrid can become capacitive. To have these high frequency spikes, external ferrite leads and small capacitors may be used to tame the residual spikes.

In some applications (such as cameras, low noise amplifiers, etc.) it is desirable to attain additional differential filtering. Surface mount ceramic capacitors make the best filters when wired as shown in the figure (as a four terminal capacitor).

While other filter circuit topologies are possible, this type of filter arrangement has proved to be highly useful in production applications requiring good suppression of converter noise.

It is important to note that although the outputs of the hybrid DC-DC Converter are highly filtered, the outputs will normally exceed MIL-STD-461 levels. Also, connecting the case to the output leads bypasses the internal common mode filter and may result in the input exceeding EMI levels or the output spikes increasing. If the case must be connected to output ground for any reason, it is helpful to use a high value resistor (a value of 10K to 100K should be considered).

However, the case may be connected to RF or chassis ground to enhance EMI filtering.

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Additional Filtering

Additional filtering may be added to the DC-DC Converter outputs to reduce load transients, fundamental ripple or spike waveforms.

If adding external components in order to reduce load application or load removal transients, low ESR solid tantalum capacitors should be used. An external series inductor should not be used since this will add impedance and negate the benefit of the external capacitance. Relatively large amounts of external capacitance may be added, but do not exceed the following guidelines without consulting MDI.

The maximum recommended external output capacitance on the main regulated output is a function of the converter's output voltage and power. For a 5 VDC output, 100 microfarads may be added to a 6.5 watt unit, 330 microfarads for a 20 watt unit, 500 microfarads for a 30 watt unit, 680 microfarads for a 40 watt unit and 1000 microfarads for an 80 watt unit.

For a higher voltage unit, the capacitance should be reduced by the inverse square of 5 VDC and the actual voltage. Conversely, for a lower voltage unit, the output capacitance may be increased by the square ratio. For outputs that are linear regulated, there is no restriction on the external output capacitance.

If adding external components in order to reduce high frequency spikes, multi-layer ceramic capacitors in surface mount chip form should be used. For best results, the capacitor should be connected as a four terminal device (see Figure 5 below). An external series common mode inductor or ferrite beads should be used between the converter and the capacitor.

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Achieving Ultra Low Output Ripple

Most MDI DC-DC converters produce an output ripple that is 40-60 dB below the DC output value. This level of ripple voltage is sufficient for most applications, but some critical applications require additional attenuation of ripple voltage. A typical additional attenuation requirement is -20dB (a factor of 10:1).

It is difficult to obtain this additional attenuation in the same package as the DC-DC converter because the small physical size of the DC-DC converter allows the high frequency ripple to bypass or "jump around" the filter components.

For this reason, when ultra low output ripple is needed, the user must provide supplemental filtering outside the DC-DC converter package. This can take several forms.

  • A set of discrete filter components can be added on a circuit board.
  • A ripple filter contained within a hybrid module can be used.
  • A filter inductor in combination with coaxial feedthrough capacitors can be used.

The output ripple has both differential and common mode content. The lower frequency ripple, at the DC-DC converter’s switching frequency and its harmonics, is primarily differential. The higher frequency spikes are primarily common mode. Therefore, to be effective, the inductive element of the filter should attenuate both differential and common mode signals.

The capacitive element should have low ESR, such as a four wire Kelvin connected ceramic capacitor, or, ideally, be a high capacitance ceramic multi-layer feedthrough capacitor. When using a feedthrough capacitor, it should be mounted on an adjacent chassis wall that provides shielding.

A single LC stage is generally quite effective in achieving 20-30 dB of attenuation. The filter resonant frequency can be in the 30 to 40 kHz. range.

Achieving ultra low output ripple in the presence of audio modulation:

Audio modulation on the input of the DC-DC converter can feed through to the outputs. Applying the audio signal causes the DC-DC Converter's output to be modulated at the audio frequency. Thus, the output of the DC-DC Converter has the normal high frequency ripple with the audio superimposed.

The MDI full featured DC-DC Converters have excellent rejection of conducted susceptibility due to their current mode inner loop. The basic converter has a loop gain of greater than 50 dB. The typical EMI resonance is in the 5 kHz to 10 kHz area, where a peaking of approximately 10-12 dB can occur. This peaking amplifies the conducted susceptibility, so it subtracts from the basic audio rejection of the converter. Beyond this point, the filter adds attenuation.

In MDI's standard triple output converters, one output (usually 5 VDC) is the main regulated output. Only the main regulated output will exhibit conducted susceptibility effects. The other two outputs are linear regulated. In this event, there is virtually no discernible effect on the linear regulated outputs arising from the conducted susceptibility. The reason for this is the additional voltage rejection of the linear regulators themselves.

Relatively low frequency audio components cannot be attenuated by the small, high frequency filters required to achieve ultra low output ripple. Therefore, in applications where audio modulation is present on the input of the DC-DC converter, one of the three solutions, each of which provides "double regulation", should be considered:

  • Use only the linear regulated outputs (found in MDI’s triple output converters).
  • Feed the input of the DC-DC converter from the output of another DC-DC converter of the appropriate power rating.
  • Feed the input of the DC-DC converter from the output of a DC-DC booster of the appropriate power rating.

Use of remote sensing pins in conjunction with ultra low output ripple filters

When the Remote Sense feature is used, there is a chance of instability when sensing beyond an external output filter. The poles introduced by the filter inductance and capacitance could cause the voltage loop to go unstable. Therefore, while use of the remote sense connections before any external post filter is acceptable, the remote sense connections should not be tied to the output of the post filter.

To maintain load regulation, the resistance within the filter should be appropriately minimized.

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Back Voltage

A back voltage may be applied to the outputs of the DC-DC Converter, whether it be energized or de-energized. Up to 20% above the output's rating may be applied. If the back voltage is applied to the main regulating output, linear regulated outputs (if any) will shut down.

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Series and Paralleling Converter Connections

When sharing power at a higher output voltage, converter outputs may be connected in series. For example, four 80 watt converters each delivering 30 VDC on their output may be connected in series to provide 320 watts at 120 VDC. Series converters always share output current. Power is shared to the extent of the (excellent) voltage regulation.

Series Circuit Block Diagram

The outputs of like converters may be connected in parallel without damage. However, they will not share the output load to any guaranteed extent without some ballasting resistance or external circuitry. A proven active parallel circuit for forcing current sharing of three low voltage 80 watt converters is shown. This circuit may be extended to four or more converters.

Active Parallel Circuit

Some applications require a higher output current than a single DC-DC converter can deliver.

The figure above shows a "master - slave" active paralleling circuit that can be used to parallel two, three or more converters. In this connection, one or more "slave" converters are made to actively track the output current of a "master" converter. The diagram shows two slave converters; more may be added by repeating the circuit configuration.

The output current of the master converter is measured by current shunt R 1. The output current of the slave converters are measured by current shunts R7 and R 10. The R1, R7 and R10 shunts are connected to a common output point. It is good construction practice to construct the circuit so that the shunts are located physically close to each other, which balances the wiring drops.

The idea behind this paralleling circuit is to compare the output current of any individual converter, as measured by the shunt on each "slave" converter, with an average output current of all converters. The difference between individual and the average current is amplified and used to send a signal into the adjust pin of the "slave" converter.

The comparison is done using an operational amplifier. An LM158 or LM124 is preferred since these types can operate from a low supply voltage and their input common mode range extends down to the negative rail.

In order to avoid conflict between the DC-DC converter’s main internal feedback loop and the paralleling loop, the paralleling loop is made subordinate to the main loop. This is done by lowering the bandwidth and gain of the paralleling loop.

The output of the paralleling loop controls the "slave" DC-DC converter through the slave converter’s adjust pin.

Average Output current is obtained from a resistor network consisting of R2, R8 and R11.

The Individual converter actual current is fed through resistors R12 and R15.

It can be seen that the DC voltage dropped across the shunt resistors is negative with respect to the common output. While most LM158 or LM124 operational amplifiers can operate slightly below the negative rail, it is good practice to positively bias them above the rail. Biasing the op amp inputs above the rail is accomplished by connecting each op amp input to the plus rail through equal value resistors, namely R4, R5, R6 and R9. The impedances at each input are balanced at 3.3 Kohm by resistors R2, R8, R11 and R15.

With no external adjustment, the adjust pin voltage sits at 1.5 VDC. The final biasing step is to add a small positive bias to the "average" current point so that the operational amplifiers sit at 1.5 VDC when all is otherwise in balance. R3 is selected so that the positive input of the slave operational amplifiers sits at 15 mV higher. When amplified by 100, as set by R13 or R16, the operational amplifier’s output is biased at 1.5 VDC.

Here are some additional practical hints. Use at least ± 1% resistors. Equalize the effects of wiring drops and use Kelvin connections for the shunt resistors. The initial set point voltage of the DC-DC converters should be close to each other, preferably within 1%. Always connect the ± sense pins locally. Always de-rate the current capacity of combined converters to prevent over-stress in the event of small unbalances; 95 percent is a good rule of thumb.

Finally, while the master-slave configuration minimizes the number of operational amplifiers needed, the circuit concept also works for a connection of all slave converters; just eliminate the master converter.

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Use of "OR"-ing Diodes

Although it is perfectly safe to connect the outputs of two like converters together, many applications require the use of separate external diodes when connecting two or more redundant diodes to the same point.

When OR-ing diodes are used, there is an additional voltage drop. On single output units with an adjust pin, the output can usually be adjusted upwards to compensate for the drop in the external diode. On dual or triple output units, the outputs can be adjusted upwards on special order. For example, a triple output converter may be ordered as a 5.4 VDC main output and +/- 12.4 VDC auxiliary outputs.

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Output Overload and Short Circuit Protection

MDI's hybrid DC-DC converters are protected against the damage caused by output overloads and short circuits

The peak current of the input switching stage is sampled and used to implement an inner current regulation loop, or current mode system. This current mode system improves the dynamic response of the converter.

On a cycle by cycle basis, the peak current in the switching FET is measured and compared to the set value. This then controls the switch off point of the switching FET.

In addition, this set point is limited. Therefore, on a high frequency, cycle basis, the peak current in the switching FET is also limited. This is the fast current limit.

In addition to the fast current limit, the converters have a slow current limit that operates at a lower trip current. This cycle circuit is called the "burp circuit". The burp circuit has a delay before actuation, typically 5 milliseconds. After actuation, the DC-DC converter is switched off for approximately 15 to 20 milliseconds. Then, the converter automatically restarts. This duty cycle feature produces a fold back characteristic of power dissipation. However, the fold back does not affect the converter's ability to charge output capacitors due to the delay built in.

The combination of the fast current limit provided through the current mode circuitry, and the slow current limit provided through the burp circuit provides good protection for the converter.

Since the over load and short circuit protection circuitry samples peak current in the switching FET, the circuit is more sensitive at the lower ranges of input voltages (where the input current is higher for a given load).

Therefore, the trip points are set at the lower steady state voltage.

The current protection circuitry is relatively insensitive to temperature effects. Nevertheless, the current protection circuitry is not intended to be a precision circuit. That is why it is normally set to activate between 120% and 130% of full load rated current, at the low line condition.

For Triple output converters, the auxiliary outputs are derived from three terminal linear regulators. These regulators provide additional current limiting protection, as well as thermal shutdown.

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Overvoltage Protection

MDI DC-DC Converters have protection against any control loop malfunction that results in an output overvoltage.

All Converters have an internal housekeeping voltage that operates the input side circuitry after the converter starts up. This housekeeping voltage is proportional to the output voltage. The exact proportion varies slightly from model type to model type.

If a control loop malfunction causes an excessive overvoltage, the "burp" circuit described in the previous section is activated. The converter shuts off and automatically restarts.

The trip point of the overvoltage protection is typically 33% above nominal. This trip point, which is not a precise value, is sufficiently high to prevent nuisance tripping.

It is important to note that the overvoltage protection circuit cannot monitor the output voltage, only the output voltage as reflected to the auxiliary transformer winding. Therefore, if an externally applied voltage causes the output overvoltage to excced acceptable limits, the converter can neither sense this overvoltage nor limit it.

Secondly, the overvoltage set point is not precise. Therefore, if tighter tolerances are needed, other more precise circuits outside the converter must be used.

High Precision Output OVP Circuit

The Schematic in figure 1 shows a typical suggested external circuit for a precise output OVP function.

In this example, the output overvoltage trip point is set at 5.5 VDC. Output voltage is divided by resistors R1 and R2 and feeds the input of a TL431 shunt regulator IC. In this circuit, the TL431 is used as a combination 2.5 VDC voltage reference and comparator. Resistor R3 limits the peak current into the optocoupler diode. Resistor R4 allows bias current for the TL431 without flowing through the optocoupler diode. Capacitor C is optional, and can provide a time delay before actuation.

In operations, when the voltage at the R1-R2 divider exceeds 2.5 VDC, the opto coupler conducts, causing the converter to inhibit. This causes the output voltage to fall. The inhibit is automatically removed when the output voltage drops.

Figure 2 shows a variation of figure 1, which can be used when the output trip voltage is low. A low voltage shunt regulator (TLV-431) is used because it has a 1.22 VDC reference voltage. A PNP transistor is used to buffer and invert the TLV-431 output. This allows a trip voltage of less than 2 VDC, or greater, depending on resistor divider values.

Figure 3 shows yet another version, used for higher voltage outputs, such as ± 15 VDC. In this circuit, the TL431 and opto coupler are fed from the common ground, reducing voltage stress on the TL431. However, the sensing is from the positive to negative terminals for greatest accuracy.

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Control Pin Operations
Effect of Input EMI Filter

The input EMI filter is connected to the negative leg of the full featured hybrid DC-DC Converters as well as the positive leg. This is known as a split filter. While the equivalent filter components could theoretically be placed entirely in the positive leg, prevention of noise bypassing the filter requires that the filter be present in both input power circuits.

Therefore, the internal PWM circuit ground is isolated from the input power return by the lower leg of the input EMI filter. Care must be taken in the design of the externally connected circuitry such that a) the voltage drop across the negative leg of the input EMI filter does not get conductively coupled to the input circuitry, causing unwanted operation and b) that the negative EMI filter leg is not bypassed.

Normally, the static voltage drop across the input filter is very low, on the order of several hundred millivolts. However, under dynamic conditions, the voltage drop across the negative leg of the input filter can be much larger. Such dynamic conditions can include line voltage changes, (CS06) input spikes and (CS01) audio modulation.

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Inhibit/Inhibit Not

Inhibit input for remote turn-on and turn-off, and is referenced to the input return through the negative EMI filter leg as discussed previously. Standard 28 VDC full featured DC-DC Converters have an "inhibit" function. Standard 120 , 270 and 8 to 40VDC full featured DC-DC Converters have an "inhibit not" function. On special order, 28 VDC parts can be supplied with an "inhibit not" function.

An "inhibit" function means that the converter will turn off when a current input is applied to the inhibit pin. The input impedance is 15K ohms in series with a base-emitter junction. A minimum current of 100 microamperes emitter junction. A minimum current of 100 microamperes is recommended to inhibit the converter. To isolate the inhibit pin from effects due to the lower leg of the EMI filter, a minimum compliance voltage of 10 VDC should be used. Do not connect the inhibit pin to ground when not using, just leave this pin open. Connecting the inhibit pin to ground will cause unwanted operation under dynamic input voltage conditions. An optimum external circuit configuration for the inhibit pin is to use a PNP transistor referenced to a positive voltage source, such as the 28 VDC input. An external series resistor may be used on the inhibit pin provided at least 100 microamperes of drive current is achieved.

An "inhibit not" function means that the converter will turn off when the inhibit pin is grounded. Up to 3 milliamperes can flow to ground when the inhibit not pin is brought to zero. The open circuit voltage at the inhibit pin for the inhibit not configuration is approximately 11 VDC. This pin is best driven by an open collector. The transition voltage is approximately 5 VDC. If the inhibit-not function is not used, the pin should be left floating.

Suggested circuits for the inhibit pin interface are shown below.

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Sync Input

Pin 4 is the Sync Input. The power hybrid operates at approximately 180 kHz and may be synchronized to frequencies from 190 to 210 kHz. The sync input pulse must meet the following levels as shown in the diagram. The sync input should sit at nominal 5 VDC and transition to ground level at a 10% +/­1% duty cycle. It should be noted that the internal oscillator runs at twice the switching frequency, so a 400 kHz sync is needed for 200 kHz operation. On special order, a sync input at 200 kHz may be obtained. Other frequencies are also available on special order. Contact MDI's Sales and Marketing Department for other sync frequencies.

Synchronizing the power conversion units within an extremely sensitive system ensures that any noise generation is coincident with the system clock.

The "sync pin" must be left open if unused.

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BIT Signal

The bit signal is connected to pin 1. This signal is referenced to the input return (through the negative leg of the EMI filter). The BIT signal gives an opportunity to sense from the input side what the output is doing. The normal voltage on the BIT line is 5.5 VDC +/- 1 VDC. When the output is inhibited, or cycling in overcurrent, or cycling in overvoltage, the BIT line goes low. In this state, the output is between 0 and 2 VDC.

It is important to note that the BIT signal is referenced to the input return through the bottom leg of the input filter. The BIT line should not be allowed to sink more than 1 mA from an external source when in the low state. When in the high state, the voltage is clamped by a zener diode. No more then 1 mA should be sourced into the BIT line when in the high state.

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Soft Start

Pin 3 is the Soft Start input pin. The Soft Start pin may be used to externally program how slowly the converter turns on. There is an approximate 50 microampere current source on this pin, which charges an internal capacitor. The voltage on this capacitor clamps the PWM stage error amplifier, causing the output voltage to ramp up. The connection to pin 3 allows external capacitors to be placed in parallel with the internal capacitor.

At turn on, the capacitor is completely discharged. There is a charge interval during which the converter is completely off. This is known as the turn on delay interval. Then, the capacitor voltage traverses the active region. The capacitor voltage level in the active region depends on the load condition of the DC-DC Converter. If the converter is lightly loaded, the error amplifier voltage required to produce full regulated output is relatively low. Therefore, the transition through the active region is relatively fast. If the converter is fully loaded, the error amplifier voltage required to produce full regulated output is relatively high. Therefore, the transition through the active region is relatively slower.

Following transition through the active region, the soft start capacitor voltage enters the saturation region, reaching approximately 5 VDC. Therefore, if an external Soft Start capacitor is used, it should be rated for at least 10 VDC.

MDI's proton rad hard parts (5000, 7000, 8000 and 9000 series) also have a non-adjustable output soft start. This feature is designed to minimize or eliminate output overshoots on turn on.

Most applications of the proton rad hard series will perform more satisfactorily with no external soft start capacitor connected to pin 3. This is because external soft start capacitor values below approximately 10 microfarads will defeat the effect of the output soft start, still resulting in a soft start delay, but possibly causing an undesirable output overshoot on turn on.

For these parts, larger values of the external soft start capacitor may still be used.

The soft start pin should be left open if unused,or may be used to inhibit the converter if connected to the input return.

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Operation at Light Load

MDI specifies the converter performance when the rated minimum values of load current as defined for each part number in MDI's catalog is applied.

In addition, the following information applies:

All Converters:

MDI DC-DC Converters can not be damaged by light load or no load conditions. Most, but not all, converters continue to regulate at no load or light load. Output regulation is normally tested at 10% and 100% of rated load.

Single Output Converters:

MDI single output DC-DC Converters do not require a minimum load to produce the nominal output voltage. (An exception is the magnetic feedback series 500, 7000, 8000 and 9000 with single output below 5 VDC.) A minimum load of 10% is recommended, or consult factory for lower minimum loads. However, at load currents below 10% of the full load, the load response, line regulation, load regulation or output ripple may not perform as well as when the minimum load is exceeded. However, the operation below 10% of full load is generally satisfactory for most applications. MDI's single output converters whose output voltage is equal to or greater than 24 VDC are actually dual output converters. The output is connected from end to end and the center tap is not used.

Dual Output Converters:

MDI dual output DC-DC Converters do not require a minimum load to produce the nominal output voltage. MDI dual output converters are regulated from the positive output to the negative output. The best regulation is obtained when the positive and negative loads are balanced. As discussed in more detail in the MDI application notes, unbalances up to 10%/90% do not produce unsatisfactory results. However, if one output on a dual output converter is essentially unloaded while the other output is heavily loaded, the output voltage unbalance can exceed 10%.

If both outputs are lightly loaded, or unloaded, the balance will remain reasonably balanced.

Triple Output Converters:

For MDI's standard triple output DC-DC Converters, the main output is always the +5 VDC output. On all Semi-custom and Custom DC-DC Converters the main output is almost always the highest power output. This is because MDI usually PWM regulates around the high power output which yields the highest efficiency. The remaining two outputs, with the exception of Cross-regulated triples such as MDI model 3138- TXX, are regulated by two built-in linear regulator IC's.

The voltage produced by the linear regulators, called the auxiliary outputs, is the specified output voltage, and may typically be +/-15 VDC, +/-12 VDC or +/-5 VDC. The unregulated internal voltage preceding the linear regulators is called the header voltage. To achieve reasonable efficiency, the drop across the linear regulators is minimized. Therefore, the header voltage is minimized, since the desired output voltage is fixed.

The header voltage changes in proportion to the load on the main regulated output. When the output load current on the main regulated output is low, the header voltage feeding the linear regulators is also low. When the output current on the main regulated output is below the specified minimum current, down to no load, the header voltage on the linear regulators may drop even lower.

A triple output converter whose main output is loaded at less than the minimum load can produce regulated voltage on the auxiliary outputs provided the load current on the auxiliary outputs is also low. A triple output converter whose main output is lightly loaded cannot produce full regulated voltage on the auxiliary outputs if the load current on the auxiliary outputs is high or at full rated output. The reason for this is that the header voltage produced is too low for full regulation.

The loads on the auxiliary outputs of a triple output converter can regulate down to zero current.

In Case of Doubt

To specify a particular MDI DC-DC Converter to be used with unbalanced loads or loads below minimum rated currents, contact us. As our first choice, we may be able to suggest a MDI standard part to fulfill the requirement. If a standard part cannot do the job, MDI can fabricate semi-custom units that have suitable performance for conditions other than specified in the catalog. This may just involve a simple modification such as adding a turn or two on the transformer or changing a diode part number.

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Implementing the Remote Sense and Adjust Functions

Certain models of single and dual output hybrid power converters have Remote Sense pins and/or Voltage Adjust pins available to use when voltage drop or output adjustment is required. Table 5 defines the models with these features.

The Remote Sense feature (see Figure 12) allows the user to compensate for line drops that are inherent in power distribution. This feature is not as useful for lower power or higher output voltage converters because the line drops tend to be small in these applications, therefore remote sense compensation is only available in certain units. The converters are generally designed to allow up to 0.25 V total line drop and still meet performance. It should be noted that as the line drop compensation increases, the low line voltage operating point increases slightly. In other words, the unit may only regulate down to 17 VDC (for 28 V units) rather than 16 VDC. The higher input voltage units have additional margin to give full performance with the .25 V line drop. Also, if the output voltage increases due to line drop compensation, the output current drawn should be proportionally reduced to maintain rated power output.

If the Remote Sense feature is not needed, the +RS terminal should be connected to the positive output terminal at the converter and the -RS terminal should be connected to the negative output terminal at the converter. If the remote sense terminals are left open, the unit will regulate at approximately 50 mV to 100 mV higher than the nominal set point and the load regulation may be degraded. However, no damage to the hybrid will be experienced.

When the Remote Sense feature is used, there is a chance of instability depending on the length of the output cable. The pole introduced by the cable inductance and the load resistance can cause the voltage loop to go unstable. The length of the allowable cabling (both positive and negative added together) has been calculated for various output voltages at several output currents. A minimum frequency of 50 kHz was used for these calculations. This allows minimal phase shift at the crossover frequency of the hybrid power converter. Table 6 lists the maximum load resistance/cable length for the various voltages and currents.

Table 5: Hybrid Converter Models With Remote Sense and Adjust Functions

Notes to Table 5:
{**} indicates grade level
XX indicates an output voltage in the range of 3.3 to 23 VDC
[**]indicates case style
(*) 9.53K for units less than 12 VDC / 4.02K for units 12 VDC and above.
For the 5000, 7000,8000 and 9000 series converters, the value of R2 depends on the nominal output voltage, according to table 5.

The Adjust Pin allows the user to externally adjust the output voltage to approximately 10% above or below the nominal value. When the adjust pin is connected to the output return through an external series resistor, the output will regulate at a level higher than the nominal output. Conversely, when the adjust pin is connected to the output through an external series resistor, the output will regulate at a level lower than the nominal output.

The adjust pin allows the converter’s feedback voltage divider to be modified by the external resistor. Also, the adjust pin is connected to an internal series resistor whose purpose is to prevent damage to the internal circuit and to reduce noise pickup.

The Adjust Pin should be connected at the hybrid as connecting the pin at the load will cause a degeneration of the load regulation performance. If the Adjust feature is not used, the adjust pin should be left unconnected. It should be noted that for 28 VDC input units, as the output rises, the low line operating point increases slightly. In other words, the unit may only regulate down to 17 VDC (for 28 volt inputs) rather than the normal 16 VDC at full load. The higher input voltage units have sufficient margin so as not to be affected by any adjusted output voltage.

The following equations describe how to determine the external resistance value needed to program the converter voltage up or down:

Vadj is the desired output voltage

Vo is the converter’s nominal output voltage, prior to adjust

Vref is the converter’s internal reference voltage, according to table 5.

R1 is the internal resistor between the output and the feedback node, according to table 5.

R2 is the internal resistor between the feedback node and the output return, according to table 5.

R3 is the internal resistor between the feedback node and the adjust pin, according to table 5.

R4 is the sum of R3 and the external adjust resistor.

To determine the external trim resistor, first compute the value of R1 from the table 5 values and the converter’s nominal output voltage, using equation #1. If an upward adjustment is desired, use equation #2 to solve for R4. For an upward adjustment, R4 is connected to the output return. If an downward adjustment is desired, use equation #3 to solve for R4. For an downward adjustment, R4 is connected to the output terminal.

Finally, since R4 is the sum of the internal resistor R3 and the external adjust resistor, use the value of R3 from table 5 to find the value of the external adjust resistor, using equation #4

Equation 1

Equation 2

Equation 3

Equation 4

The preceding examples have shown either the singular Remote Sense or the Adjust features being used singularly. However, both features can be used in tandem.

Within 10%, external adjustment causes no problems internal to the hybrid power converter. Be aware that an adjustment of more than 10% may can cause internal damage to the hybrid converter. Please consult MDI applications engineering if an adjustment range greater than 10% is required.

The Remote Sense and Adjust functions integral to MDI's full featured power converters enable them to excel in a variety of situations under a range of circumstances. The reader is encouraged to contact Hybrid Engineering at MDI to discuss these features as well as any aspects of these devices.

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Recommended Mounting of Hybrids

Hybrid DC-DC Converters are power supplies that are fabricated with bare die as compared to using packaged parts. Elimination of the intermediate packages allows the size of the DC-DC Converter to be dramatically reduced. All parts are mounted on ceramic substrates which are well attached to the baseplate of the package.

Heat can be transferred by conduction (heat flow through solid material), convection (heat flow through air movement) and radiation to a cooler surrounding. Unlike some larger power supplies, hybrid DC-DC Converters are designed to be cooled by conduction cooling. Specifically, heat generated by the operation of the DC-DC Converter is designed to be removed from the baseplate of the package by conduction cooling, which is commonly known as heat sinking.

How much heat is dissipated by the DC-DC Converter? This is readily calculated by dividing the delivered power by the efficiency and then subtracting the delivered power. Dissipation may increase when the part is short circuited or overloaded. The efficiency may drop when the part is lightly loaded compared to full load ratings.

The DC-DC Converters are rated at various baseplate temperatures. It is the responsibility of the user to assure that the baseplate temperature of the con-verter does not exceed the rated value. The power dissipation of the elements is con-centrated in a number of small areas. However, the thickness of the substrate and hybrid package do a good job of spreading the heat over the hybrid base plate area. In order to get the maximum benefit out of the hy-brid, or maximum re-liability, the surface on which the hybrid is mounted must be maintained at or below the hybrid's rated temperature. If the heat sink below the hybrid is very thin, the area under the DC-DC Converter's baseplate will be hotter than necessary. Also, a thin heat sink may not conduct heat away from the hybrid very well, in areas not below the DC-DC Converter. Sometimes the heat sink is very thick and connections to the DC-DC Converter's pins are difficult to wire. In this event, the heat sink should be locally counter bored in the vicinity of the pins.

Some Common Mistakes:

Running the hybrid DC-DC Converter without a heatsink:
This is commonly done during incoming inspection. The hybrid DC-DC Converter's small thermal mass allows the temperature to rise rapidly to high temperatures that may exceed the DC-DC Converter's rating.

Trying to use a printed wiring board as a heat sink:
A printed wiring board or copper traces on the printed wiring board will conduct heat. However, the thermal resistance may be very high. Special types of boards that have higher thermal conductivity are available. The mistake made in this instance is in using a printed wiring board as a conductive heat path, but not computing the thermal resistance of this path to the heat sink.

Connecting a heat sink to the top of the case:
The top of the case is typically quite thin and only attached to the baseplate at the periphery of the baseplate. Therefore, heat is conducted from the baseplate to the case, however, the thermal resistance is less than optimum. This results in an unsatisfactory part utilization, except in the case of a very low output power.

Using a heatsink that is too small or too thin:
The temperature drop from the baseplate to the ultimate heat sink is too high because the thermal resistance is too high for the power flux and the desired temperature rise through the heatsink. Therefore, the converter operates at an unsatisfactorily high baseplate temperature.

Trying to cool by convection or radiation in thin air or vacuum:
The following true anecdote illustrates this point. A customer mounted a DC-DC Converter for a space application on a printed wiring board. The board was mounted inside a unit and extensively tested. The converter operated perfectly until the customer performed a thermal vacuum test. The converter then failed. The unit was disassembled and examined. It was apparent that the DC-DC Converter had been exposed to extremely high temperatures. While operating at normal atmospheric pressure, the converter was cooled by free convection to some extent. When the atmosphere was removed for the thermal vacuum test, the heat removal provided by free convection was not available, and the converter overheated.

In high altitude aircraft applications, the air available for free convection is also practically nil, therefore to be conservative, all conduction should be designed to be satisfied by conduction cooling.

Controlling the temperature of the mounting, not the base plate of the DC-DC Converter:
The heat of the baseplate of the DC-DC Converter is the controlling variable for controlling the temperature of the internal components. Controlling the heat of the mount ing surface alone is not sufficient. Moreover, as heat flows from the DC-DC Converter through to the underlying heat sink, the temperature of the underlying heat tends to be increased by the heat flux. This must be accounted by the analysis.

Mounting a high power converter on a non-flat surface:
Both the hybrid DC-DC Converters and the underlying mounting surfaces tend to have irregularities. Therefore, the tendency would be that contact between the DC-DC Converter and the mounting surface is only made at a few points. This results in a higher than desirable thermal resistance. The way to improve this situation is to use a thermal gap filler. This can be a high thermal conductivity grease or a high thermal conductivity silicone rubber pad. Since the case of the DC-DC Converter is usually electrically isolated from the internal circuitry, the gap filler does not need to be electrically isolating. In fact, the gap filler should be as thin as possible but still fill in the irregularities. Excess gap filler will raise the temperature.

When bolting the hybrid to the cooling surface, use adequate pressure to minimize the thermal resistance from the hybrid DC-DC Converter to the mounting surface.

It is always the responsibility of the user to insure that the bottom of the hybrid's mounting surface is maintained at a safe temperature.

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Inverted Mounting Bracket Kits

Bracket kits are available to assemble standard PCB mount flanged converter packages in an inverted position to save PWB area, accommodate space/volume constraints and/or enable point-to-point wiring options in next-level system assembly. This technique is also known as upside down or "dead bug" mounting. Brackets are constructed of rugged aluminum alloy with self-locking 6-32 inserts for high thermal conductivity to the system heatsink and vibration/shock resistance. A high conductivity thermal pad (Fujipoly Sarcon GSR) is included with each kit as is all mounting hardware except the four fasteners for system chassis panel attachment. The chart describes relevant kit and pad part numbers, descriptive drawings and temperature coefficients by converter package power level, designator and case style. Thermal pads are available separately and may be trimmed for non-flanged converter case styles of the same header family. Catalog data sheets refer; check under the Dimensions section.

 

Typical Inverted Mounting Assembly Drawing

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A Note on Hybrid Enclosure Materials of Construction and their Finishes

MDI's product lines encompass both solder sealed and parallel seam welded hermetic enclosures for DC-DC converters, Inrush Limiters, Active OR-ing and Bus Master modules and Solid State Relays. Hermetic construction means glass or ceramic to metal seals are used exclusively at the pin interfaces and the enclosures are permanently closed by intermetallic soldering or welding to seal them from environmental influences. No elastomers, adhesives, o-rings or gaskets are used. Leak rates attained are less than 5e-8 He and the construction is robust enough to maintain hermetic integrity through qualification life, vibration, shock, acceleration and thermal cycling endurance testing (QCI) provided the seals remain undamaged.

Headers are manufactured from cold rolled steel for its comparative advantage in thermal conductivity (Kovar, Alloy 42 case style 1), and electro plated in nickel followed by gold. The mounting surface is flat to .005-inch total indicator reading and its surface roughness (Ra) is 63 or better. These specifications demonstrate the need for very little (thin- section amount) of gap filler when the host heat sink is constructed to similar specifications.

Pins are generally made from Alloy 52. Those used in larger case styles (4, 7, 9, 11) are copper cored. Pins are .040 inch diameter straight types (.018 dia. case styles 1, 14, 15). Pins are finished in electrolytic gold (50 µ in.) over nickel. The use of gold plating ensures excellent solderability even under extended storage in humid environmental conditions.

Solder Sealed Devices
Solder sealed converters are constructed on platform headers with a sealing ring of solder flowed continuously about the perimeter of a drawn cover. Platform headers are exclusive to the PC mounting orientation, where pins exit the bottom of the enclosure for insertion into a through-hole PWB design. MDI case styles 1-4, 10 and 11 refer. Mounting flanges and non-flanged versions to save PWB surface area are available. In either case, compression should be maintained to the manufacture's specification for the gap filler material selected. Non-flanged versions may be mounted using thermally conductive adhesives or captured using mechanical compression assembly mounting techniques. Flanged parts should be assembled with locking hardware that compensates for pressure variation during applications of extreme or repetitive thermal cycling. Stud mounted case styles combine PWB area savings and easily implemented thermal management in rugged, vibratory environments; use locking fasteners and torque them to 8 ±1 in lb. Covers for solder sealed devices are drawn from steel (Kovar, Alloy 42 case style 1) and finished in tin/lead electroplating. A 5 percent minimum lead (Pb) content is specified to preclude the formation of whiskers or dendrites. Periodic lot testing using EDX /EDS techniques monitors Pb content compliance. Solders used in sealing are lead bearing SN63 types; fluxes are not added during the process.

Parallel Seam Welded Devices
Seam welded converters offer the ultimate in sealing technique and cleanliness and are preferred for aerospace and space applications. In this construction, a flat lid is resistance welded to a deep walled header itself constructed from a machined billet of cold rolled steel. PC (flanged and non-flanged case styles 5-7, 13, 14) and stud mounting (style 12) and chassis mounting versions (styles 8, 9, 15) are available. The same flatness, smoothness, finish and plating schedules are followed as discussed above so similar mounting notes apply. Chassis mounting offers the advantage that the converter's dissipation may be conducted directly into the host equipment frame without additional heat sink interfaces. Coordinated flatness and smoothness schedules for the host heat sink area should be applied. Chassis mount devices feature very rugged ceramic pin seals for crack-free, fracture-free, leak-free performance even as the pins may be stressed during lead forming/cutting or soldering/connecting operations.

Soldering and Wiring MDI DC-DC Converters
Devices pass Soldering Heat requirements of MIL-STD-750, Method 2031, Test Condition A - Solder Iron 350 ±10°C tip temp. for 4-5 seconds. This is the identical test to MIL-STD-883, Method 2036, Condition A.

Soldering and wiring converters is discretionary among users; following industry proven best practices help insure longevity and reliability in mission life.

While it is common to use wave or flow soldering in PWA fabrication, it is best to avoid these techniques when mounting and wiring MDI DC-DC converters. Temperatures reached at the pins in such processes may exceed those of the materials of construction inside the converter. Circuits internal to the hybrids are brought to the pins using 221°C eutectic solder and flexible stress relieved wired connections. Selection of 221°C eutectic offers a degree of margin against reflow during soldering operations outside the hybrid; hand soldering techniques with controlled heat application and 183°C eutectic is the preferred method.

Direct hand soldering the converter pins to pads in PC mount applications is common, especially among users of case styles 1 and 14 (.018 pins), where the relatively small diameter pins heat quickly and solder easily. When soldering larger converters with .040 pins, however, the advantage is not as clear-cut. Better heat control is needed due to longer dwell times necessary to heat the thicker pin, there is more solder volume and a larger PC pad involved as well. The resultant joint is more massive and has a larger bearing in coefficients of thermal expansion effects of the various materials involved in reliability life performance during thermal cycling applications.

The optimum connection scheme in MDI's view is to replicate similar connection architecture outside the converter as is used inside the converter: flexible, stress- relieved wiring. For connecting pins on chassis mount hybrids, we recommend following guidelines of IPC J-STD-001, Para. 5.4.2 wiring to terminals including stress relief of Para. 5.4.1.3 and orientation of wire lead/wrap of Para. 5.4.1.4. When connecting PC mount hybrid pins to PC pads, follow the same guidelines, wrapping the pin and continuing the wire onto the pad with stress relief making two independent solder connections with flexible, stress relieved wiring in between.

Pins may be trimmed (cut) after installation. Use sharp, high quality flush cutters and make two cuts using gentle, even pressure; the first a partial cut though, the second with a 90 degree rotation to finish. This mitigates vibration and shock effects of a single brute- force stroke on the seals. It also helps prevent the spent lead from flying wild after the cut and becoming lost FOD in the assembly. If your requirements dictate special lead lengths or lead forms, ask the factory; we can tailor to suit.

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Hybrid Junction To Case (Theta J–C)

Some customers and users ask about thermal resistance values (junction to case) for different converters.

While Theta J-C values may give useful guidance for thermal design for packaged mono element power semiconductors, the use of a single thermal resistance figure is of little or misleading value for relatively complex DC-DC power converters. That is because the converter design comprises a variety of many semiconductor elements, all electrically stress derated and thermally managed by the internal design of the converter. The Theta JC value for any one such element could vary greatly with another; an average value could misrepresent the range. This is the reasoning why such values are not typically published.

Guidelines offered in the MDI Application Notes are meant to offer assistance during thermal design of converter interfaces, such as:

The converter base plate must be maintained at or below the published maximum rated operating temperature.

The mounting surface must be flat and smooth so as to prevent air gaps or voids that will inhibit heat conduction. The use of thermal pads held in compression to the manufacturer's recommendations is encouraged to take up differences.

The heat load or flux may be calculated by assuming all (100%) of the converter thermal dissipation is accounted for by conduction; no convective or radiated components should be assumed. This will prevent problems in thermal vacuum.

The power dissipated by the converter may be calculated knowing the converter's efficiency of operation. Converter efficiency will vary primarily with applied load. Curves demonstrating how efficiency varies as a function of load are available.

The heat sink should be capable of conducting the total power dissipated within the converter to insure safe semiconductor junction temperatures are maintained. Maximum power is dissipated when input voltage is at its minimum and output load is at its maximum. Typical power dissipation for a 30watt, 5VDC output converter at worst case, 68% efficiency, would be

30 Watts/. 68 = 44.12 watts of input power.

44.12 W input
-30.0 W output
14.12 Watts of power being dissipated

The heat sink required for this example would need to conduct 14.12 watts minimum away from the converter to prevent internal temperatures from rising above maximum operating junction temperatures over time.

Generally, MDI limits the internal rise of the highest thermal dissipating elements inside the converter to not more that 20°C over base plate by virtue of excellent thermal design. The base plate reference is that of the converter, positioned approximately in the center. Applications guidelines (as above) should be carefully considered during thermal design of the host equipment to preclude hot spots, thermal runaway under vacuum and enhance reliability of the converter in its intended use.

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Cascaded Converters Vs. Single Stage Conversion

Cascaded power converters have occasionally been used in 270 VDC and 120 VDC applications because of a scarcity of converters made to operate on these input voltages, while many types are available which operate at 28 VDC. This situation has been remedied by MDI by producing a range of 270 VDC and 120 VDC DC-DC Converters that operate directly from the high voltage bus and produce the desired output voltages directly.

Other manufacturers who have a limited product range often suggest a cascade of converters from 270 VDC to 28 VDC (or from 120 VDC to 28 VDC) and then from 28 to the final user voltages. This approach has many drawbacks compared to a single stage of conversion.

  • Cascaded converters often have feedback loop stability problems due to the regulating (negative resistance) load that the output converter reflects back to the input converter. These problems are more prevalent when the power levels of both converters are similar. This may result in oscillations.
  • Overall conversion efficiency will be at least 15% lower, resulting in increased heat loads.
  • MTBF will be reduced to up to 50% because of increased parts count.
  • Weight will be increased by an integral factor.
  • Unless synchronized, beat frequencies can occur between converters
  • Price for a given output will be at least doubled.

MDI's wide range of available 270 VDC and 120 VDC input converters allows the user to generate board level voltages the right way.

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Interface of 120 and 270 VDC Converters

The Split Input EMI Filter

All MDI hybrid DC-DC Converters have an input EMI filter. The filter includes a common mode inductor (balun) as well as one or more differential inductors. The common mode inductor has two identical windings. One winding is placed in the positive power input leg and one winding is placed in the negative power input leg. The differential inductors have "split" windings. The term split refers to the fact that each half of the winding is placed around the core in two winding sections. One section is placed in the positive power leg and the second section is placed in the negative power leg. The reason for splitting the winding into two sections is that any electromagnetic or electrostatic coupling from nearby noise sources impinges on the inductor in approximately equal amounts. This helps in canceling the net effect. Within the hybrid microcircuit, physical proximity of components is tight and there is no room for shields or EMI plenums. Therefore, splitting the inductor windings is necessary.

Voltage Across the Input Filter

The input EMI filter is bilateral. It not only prevents noise from emanating from the DC-DC Converter, it also prevents external noise from perturbing the converter. This means that essentially any AC voltage appearing on the input to the converter appears across the input filter, since the output of the filter is a large capacitor.

AC voltage can include audio modulation on the DC input, spikes, surges and turn on transients. On an AC basis, approximately half the voltage appears across the negative leg of the input EMI filter. While this voltage can be relatively small with a 28 VDC Converter, it is proportionally larger in a 120 or 270 VDC Converter.

Pin Functions Referenced to the Input Return

A typical hybrid DC-DC Converter has several control and monitoring functions that are referenced to the input return of the DC-DC Converter. These include the inhibit pin, the sync pin, the soft start pin and the BIT pin. However, these functions are not actually referenced to the input return, they are referenced to the internal Converter circuitry, which is separated from the input return by the negative leg of the input EMI filter.

And from the preceding paragraph, approximately half of the AC component on the input power line appears across the negative leg of the filter. Because of the split input filter, extra consideration is required to a) provide proper control and monitoring function, b) prevent damage to the internal and external components and c) prevent conducted emissions from leaking around the negative leg of the input filter.

Connection Guidelines

Inhibit pin: The inhibit function on the 120 VDC and 270 VDC Converters is an "inhibit not". This means that the converter operates when the pin is open and is inhibited when the pin is connected to the return. The inhibit pin has a twelve volt zener diode and 0.1 microfarad capacitor connected from the inhibit pin to the converter common circuitry.

The inhibit pin does not pose a danger to leakage around the EMI filter, since it is in a high impedance mode when the Converter is operating. When the Converter is inhibited, no emissions are produced.

When turning on with a zero risetime, or when high voltage spikes are imposed, a 270 VDC converter can produce open circuit voltage in excess of 150 VDC on the collector of an external inhibit transistor. With negative going input voltage spikes applied, the base collector junction of an external transistor will be reverse biased.

The following recommendations should be followed when using the inhibit function on a 120 or 270 VDC hybrid DC-DC Converter. Use an external limiting resistor of 1,000 ohms, 1/4 watt, in series with the inhibit line. This will limit current flow into and out of the inhibit pin during spikes, surges and transients. Use an inhibit transistor with an adequately rated collector-emitter breakdown voltage. If driving the inhibit pin through an optocoupler, buffer the optocoupler's output with a transistor of suitable voltage rating.

BIT pin: The BIT pin is a low impedance source, however it should be connected to external circuitry through a relatively high impedance (above 47 K ohms is suggested) to prevent upset from external circuitry.

Soft start pin: The soft start pin is internally buffered and filtered. No special precautions are required for using the soft start pin.

Sync pin: The sync pin is connected internal through a 1000 pF. capacitor and limiting resistor. No special precautions are required for using the sync pin.

Piezoelectric Response of Input Capacitors

When 120 or 270 VDC hybrid DC-DC Converters are turned on from a fast rising waveform, or subjected to spike tests or audio modulation, ticks or sounds are sometimes heard emanating from the units. It is normal for the hybrid DC-DC Converter to produce sound when this type of voltage is applied.

The source of these sounds is the ceramic input capacitors which filter the high input voltage. The input capacitors are multilayer ceramic types with a Barium Titanate ceramic dielectric. When voltage is applied to the ceramic dielectric, the dielectric physically moves by a miniscule amount. While this effect is present at all voltages, it becomes much more pronounced at 120 or 270 VDC.

The piezoelectric effects can cause cumulative damage to the capacitor if the mounting terminations are too rigid. Therefore, MDI has developed special mounting techniques for high voltage ceramic input capacitors so that they can "sing" without damage.

The Effects of DV/DT on 120 and 270 VDC DC-DC Converters

120 VDC input hybrid DC-DC Converters have input capacitances ranging from 8 microfarads to 14.4 microfarads. 270 VDC input hybrid DC-DC Converters have input capacitances ranging from 2.3 microfarads to 5.6 microfarads. Although inrush current is limited by the input inductors, these inductors are only sized to accommodate a limited volt/second product. Therefore, on turn on, the input inductors will saturate to some extent. The saturation effect is greater for 120 and 270 VDC units than for 28 VDC parts.

As a conservative estimate of initial turn on inrush current, one may use the equation i=C(DV/DT). Typical input capacitances for hybrid DC-DC Converters is listed earlier in the application notes.

The turn on inrush current is usually more a problem during test and evaluation than in actual system applications. For example, because of contact arcing, relay contact switching is impractical at 120 VDC or 270 VDC. Most actual 120 VDC and 270 VDC systems use solid state power switching to apply bus voltage to the loads. 270 VDC buses derived from AC rectification of three phase power also have finite rise times.

Rise times of 125 microseconds or greater are preferable for 270 VDC systems; rise times of 75 microseconds or greater are preferable for 120 VDC systems. Most actual system applications have been found to meet or be lower than rise times.

Rather, it is during test and evaluation that high input voltage converters are energized from a low impedance power source by using an (over-rated) mechanical switch or a clip lead. When this happens, inrush currents can be very high and high voltages can be produced across the negative leg of the input filter. Either condition may cause damage to the Converter.

How to Lower DV/DT and Inrush Current

To lower inrush current that flows at the application of power, lower the input voltage DV/DT. If the system power source has a zero or unknown rate of rise, additional inrush limit protection should be provided.

For many high input voltage Converters, all that is required to limit inrush current is a limiting resistor in series with the input line. For example, a fully loaded 6.5 watt Converter operating from a 270 VDC source has a typical impedance of 7.8K ohms. If a 50 ohm resistor is put in series with the input line, the efficiency will drop only 0.6%. The dissipation in the resistor at this point is approximately 60 mW. However, the peak inrush current, even with a zero rise time input, will be less than 5.4 amperes. For higher power applications, use a series resistor to charge the input capacitors, as above. However, use an FET to bypass the charging resistor when the input capacitors are charged. A simple inrush limiting circuit using an N channel FET in the negative power leg is shown in Figure 17. For 120 VDC applications, it is possible to use a P channel FET in the positive power leg. For burn in and test applications, an inrush limiting thermistor is a good, simple solution to reduce turn on inrush currents. This solution does not work satis-factorily over a wide temperature range.

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Constant Acceleration Screening of Hybrid DC-DC Converters

Constant Acceleration (centrifuge) testing is a screen used to verify the robustness of a hybrid microcircuit. It is performed only in one axis, the Y1 axis.

This test originated in the testing of discrete transistors, where it confirmed the die attachment of the transistor to the case. Because the mass of the die is so low, very high accelerations are used to achieve a force high enough for screening.

In hybrid microcircuits, constant acceleration testing confirms the attachment of substrates and other components. The acceleration levels are adjusted according to the mass of the unit. However, 3000 G’s is the lowest screening acceleration listed in MIL-PRF-38534.

Hybrid DC-DC converters have relatively heavy magnetic components which are attached to the substrate with various methods, including epoxies and other adhesives. When these heavy components are subjected to 3000 G’s acceleration, very large forces result.

It is an unintended consequence of the screening requirement, when applied to the mounting of heavy magnetic components, that the screening requirement dictates the construction method, rather than the actual application requirements.

To withstand the forces generated by the 3000 G constant acceleration, it is generally necessary to use a relatively rigid adhesive or epoxy to secure the magnetic components.

The magnetic components either have ferrite cores or powdered metal cores. However, in both cases, the magnetic core material is within a ceramic matrix which is very brittle and susceptible to mechanical cracking if damaged.

Many long duration spacecraft applications for hybrid DC-DC converters result in environments where the hybrid DC-DC converters are subjected to large numbers of temperature cycles.

The use of a hard epoxy for magnetic component attach in order to meet a 3000 G constant acceleration screen increases the likelihood that the brittle magnetic core material may crack and ruin the magnetic core properties. This results in magnetic component failure.

Therefore, it may be qualitatively concluded that demanding a 3000 G constant acceleration screen may inadvertently result in a design that is less robust for actual long term space applications.

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Standard Product MIL-STD-461 Conducted Susceptibility Test Criteria

Conducted susceptibility is the response of the converter to unwanted signals applied to the power leads. Requirement CS01 tests the converter's ability to perform properly with audio frequency signals superimposed on the DC input. This is also called "audio frequency rejection." CS02 extends this into the RF range. Requirement CS06 applies positive and negative spikes to the converter's inputs.

CS01 Testing

The objective of the CS01 (Audio Susceptibility Test) is to assure that the DC-DC Converter produces a usable output when subjected to a simulated worst case AC modulation of the DC power supply input.

In the CS01 test, an audio signal ranging from 30 Hz to 50 kHz is connected between the DC-DC Converter and the power source. Both the positive and negative legs are tested if the input is isolated from the case. For a 28 VDC nominal unit, a 2.8 volt RMS (8.2 volts peak to peak) is applied. At 1.5 kHz to 50 kHz, the signal is linearly decreased. In addition, the power of the susceptibility source is limited to 50 watts. For higher voltage units, the voltage is usually scaled proportionally.

For meeting the audio susceptibility (CS01) requirements, it is not commonly realized that the audio frequencies involved are, for the most part, much lower in frequency than either an internal or external filter can attenuate. Therefore, the design of the converter itself must be capable of audio frequency rejection. This requires high loop gain at the high audio frequency range. CS01 rejection is typically achieved by using current mode or dual loop feedback.

Applying the audio susceptibility signal causes the DC-DC Converter's output to be modulated at the audio frequency. The output of the converter has the normal high frequency ripple with the audio superimposed.

Standard pass fail criteria for the CS01 test is that the peak to peak modulation envelope not exceed the specified peak to peak ripple specification. For example, if the peak to peak ripple specification is 50 mV, an additional 50 mV is allowed when the audio susceptibility signal is applied.

CS02 Testing

CS02 testing is an extension of CS01 testing that starts at the same frequency and amplitude as CS01 testing and extends into the RF range. The coupling method is different from the CS01 method to allow use of 50 OHM RF generators. The power is also limited to 50 watts.

Due to highly effective input filter response in this fre-quency range, it is unusual to detect any change in DC-DC Converter performance when this test is performed.

CS06 Testing

Spike amplitudes and durations are governed by numerous specifications. The MIL-STD-461 CS06 spike test is typical. In this test, repetitive narrow (typically 10 microseconds width) spikes are applied to both power inputs (if not connected to case ground) in turn. For a 28 volt system, the peak amplitudes are 56 volts, both positive and negative. MIL-STD-704 and MIL-STD 1275 also have similar spike requirements. Another requirement imposing spikes is MIL-E-6051. Commercial aircraft also have a DO-160 spike test.

Spike suppression is generally easier than surge suppression since the time durations are much shorter. Spike suppression can be implemented completely within a hybrid package by relying on the EMI suppression components to spread the energy within the spike over a longer period of time. This essentially transforms the high voltage spike to a lower voltage waveform incurring no loss. In certain instances, zener diodes are also used to keep peak voltages below safe limits. Typical CS06 spike suppression pass/fail criteria allow a +/­5% deviation when the spike is applied.

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MIL-STD-461D, E, F and G EMI Filtering

Introducing MDI's 3090, 3656 and 6681 series DC-DC Converters with advanced MIL-STD-461D, E, F and G EMI Filtering

MDI pioneered development and manufacture of an extensive range of hybrid DC-DC converters with internal filters that met widely used standard MIL-STD-461C for conducted emissions and susceptibility, power leads. Recently, many customers have also requested DC-DC converters featuring internal EMI filters that meet later revisions MIL-STD-461D, E, F and G.

These later revisions require more filter attenuation and a different filter topology than revision C, primarily because of different measurement techniques and limits. They present additional challenges of realizing more filter attenuation without increasing unwanted filter resonance effects within the interior volume limitations of MDI's existing case sizes.

After considerable analytical development, optimization of pin outs and packaging and advanced filter design, MDI introduced three advanced product families of hybrid DC-DC converters. The compact series 3090 produces 5 watts, the model series 6681 produces 30 watts and the series 3656 produces 80 watts. Models in these series are offered in single and dual outputs; all incorporate built-in EMI filters and meet MIL-STD-461D/E/F/G CE101, CE102, CS101, CS114, CS115 and CS116. They also meet DO-160C/D/E/F/G CE section 21 and CS sections 20 and 22. These comprise state-of-the-art DC-DC converters that fulfill the latest Electro Magnetic Compatibility (EMC) requirements for aerospace, defense and civil aviation airborne electronics applications.

Conducted Emissions Scans, MIL-STD-461D CE102
Input Power Lead and Input Return Lead for 3090 5V Single Output Hybrid DC-DC Converter

Very compact and highly efficient, each model incorporates a completely self-contained input EMI filter that enables compliance with:

  • MIL-STD-461D/E/F/G:
    • Conducted Emissions (CE)
      • CE101, power leads, 30Hz - 10kHz
      • CE102, power leads, 10kHz - 10MHz
    • Conducted Susceptibility (CS)
      • CS101, power leads, 30Hz - 150kHz
      • CS114, bulk cable injection, 10kHz - 200MHz
      • CS115, bulk cable injection, impulse excitation
      • CS116, cables and power leads, damped sinusoid transients, 10kHz - 100Mhz
  • DO-160C/D/E/F/G:
    • Conducted Emissions (CE)
      • Section 21: power lines, emissions 15kHz - 30MHz, categories B, LMH, AZ
    • Conducted Susceptibility (CS)
      • Section 20: power lines, 10kHz - 400MHz
      • Section 22: lightning induced transients

The 3090 and 6681 designs are robust enough to operate through MIL-STD-704A 80V/100mS power line transients. The 3656 series, designed for MIL-STD-1275 vehicle electronics applications, survives 100V surge and 250V spike requirements of that specification.

The following application note describes the design considerations involved in producing these advanced parts.

What is EMI

EMI, or Electro Magnetic Interference is defined as the unwanted emission of signals from a device, such as a DC-DC converter. This unwanted emission of signals can cause upset to other devices within a system, or to other devices external to a system. It can also cause upset to circuits within a device, which is termed "self-EMI".

All DC-DC Converters Produce EMI

Just like there's never been "a baby with no crying", there's never been a switching converter with no EMI. The EMI spectrum preceding the filter (which the filter must attenuate) depends on the type of switching waveform, whether simple pulse width modulation or a zero voltage/zero current switch technique. The power level also has a direct influence. PWM modulation usually (but not always) has a fixed frequency spectrum, whereas the zero current or voltage schemes can vary widely with frequency.

Even though the zero switching methods produce less pre-filter EMI, the noise comes in "packets", and at light loads appears at a relatively low frequency. This low frequency spectrum makes filtering more complicated and more comparable in size and weight to fixed frequency filters.

Based on the relatively low power level delivered by hybrid DC-DC converters, MDI usually uses the fixed frequency PWM method.

EMI Emissions Specifications

Because engineering requirements are quantitative, the degree of allowable signal emissions is normally defined by an allowable spectrum limit, shown in terms of log amplitude (decibels) versus log frequency. Some representative EMI specifications are:

  • MIL-STD-461C*
  • MIL-STD-461D and up
  • DO-160
  • FCC/VDE
  • SSP30237*

Allowable EMI emissions may be specified in terms of a current or of a voltage. The specifications above with an asterisk use a current measurement. The others use a voltage measurement. Each of these specifications contains one or more limit lines, above which EMI is not permitted.

With the current measurement requirement, the leads to be tested for EMI (usually both input power leads) are connected through a very low inductance 10 microfarad feedthrough capacitor. The capacitor is an RF ground. The measurement is made by clamping a current probe around each lead to be tested. The current probe then generates a voltage signal which is fed into the spectrum analyzer or EMI receiver. The EMI specification limits for current measurement requirements are in terms of dBuA, which means dB above a microampere.

In specifications with a voltage measurement requirement, the leads to be tested for EMI (usually both input power leads) are connected through a LISN (Line Impedance Stabilization Network). A LISN is a high pass filter which allows power to be applied without attenuating the EMI signal, and the EMI voltage is made to appear across a 50 ohm termination. This signal may then be applied directly into the spectrum analyzer or EMI receiver. The specification limits are in terms of dBuV, which means dB above a microvolt.

When testing high power units (or high input current units), a special LISN may be needed to prevent the unit under test from malfunctioning or oscillating because of the LISN's high impedance.

The design of a DC-DC converter EMI filter should consider the specified method of EMI measurement.

Because EMI specifications using current probe measurement feed the power leads through a large capacitor, it is advantageous for EMI filters to have an inductor as its first input element. No attenuation improvement would be gained unless the input capacitor is much larger than 10 microfarads.

On the other hand, it is advantageous for EMI specifications using voltage measurement with a LISN to have a capacitor as its first input element. No attenuation improvement would be gained unless the input inductor has an impedance much larger than the 50 ohms presented by the LISN.

The degree of EMI filtering required when comparing a current measurement EMI specification and a voltage measurement EMI specification can generally be equated by increasing the current limit lines by 34 dB, which is 20 Log 50 ohms.

EMC Conducted Susceptibility

In addition to limits on a DC-DC converter's emissions, EMI specifications include externally imposed input power line effects (such as spikes and audio modulation) that a DC-DC converter must withstand. These input line effects can derive from the power source, such as a generator, or from the combined effect caused by other loads on the power system.

The imposed effects on the DC power lines are not uniform, but vary by the particular specification imposed. These perturbations superimposed on the input power lines always have some effect on the DC-DC converter's output voltage. When large scale perturbations are imposed by specification, the specific allowable effect on the DC-DC converter's output should be explicitly specified and understood.

Synthesizing an EMI filter

EMI filters for DC-DC converters pass the DC power, but block the high frequency emissions. Therefore they are Low Pass Filters.

In synthesizing the EMI filter, the designer estimates the difference between the un-filtered spectrum and the EMI specification limit lines (and also adding margin).

There are infinite combinations L, C and R that can achieve the required attenuation. It is not trivial to select a combination that is satisfactory for all constraints. The DC-DC converter designer is constrained by at least six factors:

  • Filter resonance that does not unduly amplify input power conducted susceptibility and adversely affect DC-DC converter output voltage.
  • Filter resonance that causes AC power loss and heating.
  • Filter output impedance that can cause the DC-DC converter to become unstable.
  • Filter DC power loss that causes loss of efficiency.
  • Filter parasitic and layout effects that spoil the attenuation.
  • Filter components that can physically fit inside the DC-DC converter.

Coping with Audio Susceptibility

EMI filters are low pass filters whose cut off frequency must lie in the audio frequency range since the switching frequency is well above the audio range. LC filters will have one or more resonant peaks near the filter cut off frequency. Depending on filter damping, LC ratios, etc., the EMI filter can amplify both audio frequency conducted susceptibility as well as input spikes. This unwanted effect can be minimized by controlling filter damping and by staggering filter resonance frequencies.

By controlling filter resonance, we also minimize the possibility of large circulating currents driven by audio susceptibility, which can cause filter heating.

Avoiding "Middlebrook" oscillation

Most regulating DC-DC converters have a negative impedance characteristic to some extent. In other words, with a constant output load, as the input voltage is increased, the input current is reduced.

A paper written by Dr. Middlebrook described how the combination of an input filter's positive impedance can interact with a DC-DC converter's negative impedance to create an input side oscillation. Because we want the DC-DC converter to be efficient, we want it to have its negative impedance characteristic, and therefore we need to prevent the "Middlebrook" oscillation by keeping the EMI filter impedance as low as possible.

(This "Middlebrook" effect is the same phenomenon that creates an oscillation when EMI testing is done with a high impedance LISN.)

Parasitic LC effects bring us to reality

When we synthesize an EMI filter design, we start with pure L and C elements. However, in the real world, all passive components have "parasitic" effects that spoil the "purity" of the L's and C's. In inductors, shunt capacitance allows high frequency to pass. Winding resistance can cause power loss, but we can also appreciate the added damping that winding resistance offers. Inductance can vary with current and temperature.

Capacitors have ESR (equivalent series resistance) and ESL (equivalent series inductance). Capacitance can vary with applied voltage, temperature and frequency.

Capacitors and inductors can have stray capacitance to the mounting surface and to the case. Finally, EMI can bypass the filter entirely if the layout of the filter is not optimized and if component-to-component proximity is ignored.

In a large, discrete power supply, the mechanical aid of a shield or an EMI plenum can be used to prevent parasitic EMI leakage around an EMI filter. However, in a small hybrid microcircuit, components are in close proximity and there is no room for a physical shield. This makes implementing such a design more art than science.

Why an external filter for one or more converter not ideal

All power sources have an impedance. As well, all EMI filters have an impedance, and this impedance is typically much higher than the power source impedance.

When hybrid DC-DC converters were introduced many years ago, none had built in EMI filters. Then, in response to customer demand, some manufacturers produced stand alone EMI filters that were intended to filter one or more DC-DC converters. This approach has several drawbacks:

  • The extra cost, size and weight of the additional hermetic hybrid package.
  • The wiring between the filter output and DC-DC converters are "hot" and can radiate EMI.
  • Because of the common filter impedance, the loading on one converter can influence the input to other converters using the same filter. This can cause output cross regulation or added ripple.

Why one filter per converter is best

Here are some reasons why the MDI concept of one filter per converter is best:

  • Only one package minimizes size, weight, cost and engineering risk.
  • EMI filter is optimized for the converter, no cross regulation between converters
  • No exposed "hot" wires between filter and converter
  • Output Common Mode filters keep EMI "bottled up" in the can.

What about Radiated emissions and susceptibility?

As part of most EMI specifications, in addition to the requirements for controlling conducted emissions and for withstanding conducted susceptibility, similar requirements apply for radiated emissions and radiated susceptibility.

MDI DC-DC converters are packaged in completely enclosed metal packages, which act as a shield for radiated emissions and radiated susceptibility. Therefore, only the input output and control leads are a factor for radiated effects.

The first available hybrid DC-DC converters from other manufacturers did not contain integral EMI filters and gave little consideration for meeting EMI requirements. Many of these early converters established industry standard pin outs which were not optimum for controlling radiated effects.

In particular, these early pin outs separated the power inputs by the width of the case. Also, output pins were in close proximity to the input pins. This is poor practice for minimizing radiated effects. Wide spacing of input power pins not only affects external radiation, but increases radiated noise inside the hybrid converter.

Input power leads can serve as antennas if they form a big loop. Optimum practice is to locate input power plus and return close to each other. To reduce the radiated loop, power wires can be twisted. If power wires are run through a printed wiring board, the traces can be co-planar, top and bottom.

All MDI DC-DC converters contain output common mode filters, which reduce high frequency noise. Output high frequency noise is typically generated by output rectifiers and is in the range of 10 mHz. to 30 mHz. The output common mode filters provide high attenuation of this output noise.

Nevertheless, DC-DC outputs should be wired properly to minimize any possible radiated EMI. In particular, large wiring loops should be avoided and outputs should not be routed close to input leads.

In general, if these practices (which are facilitated by proper pin out selection of the hybrid DC-DC converter) are followed, radiated emission and susceptibility requirements should be readily met.

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Standard Hybrid DC-DC Converter Derating Criteria

1.0 Scope

This criteria provides design ground rules for MDI standard hybrid DC-DC Converters. It is superseded by specific customer requirements. This document is based on the requirements of MIL-STD-454 requirement 18, MIL-STD-975 and MIL-PRF-38534.

2.0 Capacitors

2.1 Solid Tantalum (CWR or equivalent) shall be derated to 50% of steady state rated voltage as a goal, with an absolute maximum of 70% with design approval. Transient voltages shall not exceed the manufacturer's rated values. Worst case ripple current shall not exceed manufacturer's rating at maximum operating temperature. An impedance of 1 OHM per volt or the equivalent obtained by circuit impedance or rate of voltage rise control shall be provided to limit surge current.

2.2 Ceramic (CDR or equivalent) shall be derated to 60% of steady state rated voltage as a goal, with an absolute maximum of 80% with MDI design approval. Transient voltages shall not exceed the manufacturer's rated transient values. Worst case ripple current shall not exceed manufacturer's rating at maximum operating temperature.

3.0 Microcircuits

The derating of microcircuits shall conform to MIL-STD-975 Revision G, Paragraph 1.2.2.

4.0 Resistors

The derating of printed resistors shall be in accordance with the requirements of MIL-PRF-38534.

The derating of discrete and chip resistors within the hybrid shall conform to MIL-STD-975 Revision G, Paragraph 1.2.3.

5.0 Semiconductors

The derating of semiconductors shall be in accordance with MIL-STD-975 Revision G, Paragraph 1.2.4.

6.0 Magnetic Components

The derating of Magnetic Components shall be in accordance with MIL-STD-975 Revision G, Paragraph 1.2.5 and 1.2.6 except that an operating voltage of 90% of rated is permissible and a temperature relaxation of 20šC is permissible.

7.0 Bond Wires

Bond wire sizing shall be sized in accordance with MIL-H-38534, based on worst case peak currents.

8.0 Conductor Tracks

Printed Conductor tracks shall be sized in accordance with MIL-PRF-38534, based on worst case peak currents.

9.0 Voltage Breakdown Between Insulated Points

The spacing between printed conductors, between bond wires and printed conductors, between package pins and the case, etc., shall be verified by design to permit a 50% derating of DC breakdown voltage at the worst case atmospheric conditions.

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MTBF (Mean Time Between Failures)

Mean Time Between Failures for a hybrid DC-DC converter may be estimated using the parts count method, or calculated using the stress method. In order to get a precise MTBF calculation, the following must be known:

  • Component stress at the actual operating conditions.
  • Component temperature at the actual operating conditions.
  • Parts quality and screening.
  • Actual application environment.
  • The method and piece part failure rate data specified for performing the calculation.

This means that a lot of very specific analysis is required as a pre-requisite to getting an accurate MTBF value.

Fortunately, MDI can offer generic MTBF values based on some common assumptions:

  • Operating base temperature 50° C.
  • Overall power derating 75%.
  • Parts quality and screening suitable for applications.
  • MIL-HDBK-217F notice 2 used for calculations.

Based on these assumptions, the following are "generic" MTBF's for a typical 30 watt dual output converter:

  1. Ground Benign
    646.041.1 Hours
  2. Ground Mobile
    394,802.9 Hours
  3. Naval Sheltered
    394,802.9 Hours
  4. Airborne Inhabited Cargo
    394,802.9 Hours
  5. Airborne Inhabited Fighter
    355,322.6 Hours
  6. Airborne Uninhabited Fighter
    273,325.1 Hours
  7. Rotary Wing Aircraft
    273,325.1 Hours
  8. Missile Flight
    355,322.6 Hours
  9. Space Applications
    2,584,164.2 Hours

MDI can provide specific MTBF calculations for a customer's actual operating conditions according to the customer's order.

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Radiation Effects on DC-DC Converters

DC-DC Converters frequently must operate in the presence of various forms of radiation. The environment that the converter is exposed to may determine the design and performance of the part and how the part may perform during and following the radiation exposure. The following is a brief discussion of some of the radiation factors influencing DC-DC Converters.

Unmanned Space

The radiation environment mainly consists of a relatively steady accumulation of ionizing dose as well as sporadic high energy particles which cause Single Event Upsets (SEU).

Total ionizing dose accumulations for unmanned space applications range from several thousand Rads (Krads) to several hundred thousand rads. Many applications have expected operating lives that exceed ten years, resulting in a correspondingly high accumulation of radiation dose. However, dose rates are relatively low. The ionizing radiation dose may consist of electrons, or of heavier particles such as protons or neutrons. The mix of radiation depends on the particular orbit as well as the degree of shielding between the converter and the environment. Shielding is more effective with electrons and less effective with energetic heavier particles.

Single Event Effects depend on the energy of the particles. Higher energy particles occur with a lower frequency than low energy particles. The measure of energy for single event particles is the MeV*cm2/mg.

Manned Space

Since the lethal radiation dose for human beings is only several hundred Rads, manned space applications have much lower total dose requirements than unmanned space applications. Total dose accumulations normally do not exceed several Krads. However, more of the ionizing dose may consist of heavy particles, such as protons. Single event effects are also an important consideration.

Nuclear / Ground

The radiation considered in terrestrial applications arises from the detonation of nuclear weapons. The total accumulated dose can be relatively low compared to a space requirement, but the dose rate is much, much higher.

Moreover, there is a high rate of neutron fluence and X- ray effect associated with nuclear detonations.

Compared to radiation encountered in a space application, radiation effects from a nuclear detonation are much more transient in duration. The nuclear effect creates photocurrents in active devices which, for a very short duration, turn on the devices.

Total Ionizing Dose

Total ionizing radiation doses cause cumulative damage in electronic components. This damage can cause component parameters to change from their pre-radiation values. Some types of components are much less susceptible to radiation damage than others. Passive components, such as resistors, capacitors, inductors and transformers are relatively immune. Active components such as rectifiers, junction FET's and zener diodes are not relatively affected.

Active components such as opto-couplers, integrated circuits, enhancement FET's and bipolar transistors may or may not be susceptible to parametric change due to total ionizing dose, depending on their construction.

Designing a DC-DC Converter that will perform properly after exposure to total ionizing dose requires a knowledge of which parts to select and how to overcome the limitations of existing parts to achieve the desired result. Very often, it is possible to use some components that have a level of change that is tenable due to the insensitivity of the surrounding circuit.

Total dose radiation falls into two basic categories. They are radiation from gamma rays (electrons) or from heavier particles (protons). Up until several years ago, it was not well known in the power electronics community that: a) the parametric degradation of certain components differed depending on whether the radiation consisted of electrons or protons and b) certain terrestrial orbits had significant proton radiation.

These conditions were first widely disseminated after analyzing failures in discrete (non-hybrid) optocouplers. The findings were that opto couplers were particularly sensitive to parametric degradation when exposed to proton radiation. Other types of active components were also found to be more affected by proton radiation than previously expected. However, most types of bipolar integrated circuits that are commonly used in DC-DC Converter designs are not affected significantly more with proton radiation than with gamma radiation.

In an unmanned space application, total ionizing dose occurs at a relatively low rate, but extends over many years. Since no one wants to wait many years for the performance of a radiation test, testing is done at a higher rate that takes a day or two at most. It has recently been discovered that low dose rates cause more parametric degradation than high dose rates. This is a counter-intuitive effect. However, it has been found that at the higher dose rates, the damage caused by the ionizing radiation is annealed, or healed. At the lower dose rates the damage is actually more cumulative. Therefore, the parametric change in components at low dose rates must also be considered when selecting components.

Total ionizing dose may be reduced by shielding. Most spacecraft applications use radiation shields outside the area of the DC-DC Converter. Shielding is more effective when the radiation dose consists of electrons and low energy particles. It is much less effective when the radiation dose consists of protons. Also, shielding becomes ineffective beyond a certain point because of secondary emission. This means that radiation impinging on the shield causes a secondary emission, which emanates from the shield.

Single Event Effects

Single Event Effects are circuit upsets or damage caused by small numbers of energetic particles. The frequency of these events is inverse to the energy of the particles. That is, the more energetic particles occur less frequently.

The result of a Single Event Effect is usually the unwanted conduction of a semiconductor device for a nanosecond or sub-nanosecond interval. The device exposed to the single event particles can be latched into an unwanted state or can recover from the conduction after the event ends.If the device latches into an unwanted state, the cause may be activationof parasitic components that would normally be otherwise out of the picture.

Therefore, Single Event Effects can affect certain types of semiconductors, such as CMOS parts, more than other devices, such as bipolar junction isolated parts. The devices selected for MDI DC-DC Converters, which are designed to be radiation resistant, use bipolar IC's and avoid CMOS and BiCMOS IC's.

In addition, the circuit topology can very much influence Single Event tolerance. For example, a half bridge (or full bridge) power stage has one (or two) series connected switching transistors across the power line. Only one transistor is permitted on at a time in each leg. A single event can turn on the "off" transistor, causing a shoot through current. If the current is not limited by passive components in some way, the single event can cause destruction of the transistors. Other power stage topologies, suchas flyback, single ended forward, etc., have the impedance of a transformer in series with the switching transistor. Therefore, the current that would flow in the event of an unwanted transient conduction is much more limited.

Control circuit topology can also cause problems when exposed to single event particles. As an example, the original MDI converters incorporated a cyclic current limit circuit using an LM139 comparator IC. The cyclic current limit circuit is designed to shut the converter off for a period of time when an overcurrent is detected, turning it back on automatically. However, if the LM139 is hit with a single event particle, it instantaneously changes state. Since the comparator reverts to the proper state after the event, this would not otherwise be a problem, except that the external latching circuitry recognizes the transient change of state as an overcurrent, and cycles the current limit. MDI resolved this unwanted operation by incorporating an RC time constant in the latch circuit. The purpose of the RC time constant is to discriminate against the very narrow pulses produced by a single event, and the wider pulses produced by a true overcurrent condition. By adding the RC circuit, MDI made the circuit function immune to Single Event Effects. The charge stored on the capacitor remembered the desired circuit state and allowed the circuit to recover after the event passed.

This demonstrates that with proper circuit topology, parts that may otherwise be sensitive to single event effects can be overcome by circuit elements.

Neutron Fluence

Neutron Fluence is significant mainly in applications where the DC-DC Converters must operate in the vicinity of a nuclear bomb blast. As would be expected, the effects caused by Neutron Fluence on the ground are similar to those caused by proton radiation in space.

As far as components normally used in DC-DC Converters, the optocoupler, if used, is found to be the susceptible component to damage from neutron fluence. In particular, the LED part of the optocoupler is found to be the item most usually degraded by neutron fluence. Different types of LED's are used within optocouplers. Some of these LED's are much more resistant to neutron fluence than the common GaAs LED's.

A better solution is to eliminate optocouplers altogether. Optocouplers transmit a signal from one ground to another. In a DC-DC Converter, the control loop error signal is the parameter that is passed through the optocoupler. This feedback function can also be achieved by coupling the error signal through a transformer. Elimination of the optocoupler and replacement by a magnetic coupling is the basis for MDI's 5000 series Proton Rad Hard DC-DC Converters.

MDI’s 5000, 7000, 8000 and 9000 series parts, in the R, RE, S, SE grades have standard rating of 100 Krads TID and 82 MeV*cm2/mg for SEE. However, the ultimate capability of these pares is in excess of 200 Krads TID and 82 MeV*cm2/mg.

MDI’s 120 VDC space station application parts in the R, RE, S, SE grades are rated for 25 Krads TID and 37 MeV*cm2/mg, consistent with space station environments.

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MDI's Low Voltage DC-DC Converter Series

In response to customer requests, MDI extended the line of 28 VDC full featured hybrid DC-DC Converters to a low input voltage range, 8 to 40 VDC. This represents a five to one operating range, a wider range than virtually all hybrid DC-DC Converters.

These DC-DC Converters were derived from MDI's line of 28 VDC nominal full featured parts. The modifications to the full featured family occurred in several areas. The nature of the modifications should be understood by the user so that full benefit can be derived from these parts.

1. In order to use established input EMI filter components, the current rating of the filter is rated at the current that flows at an input voltage of 16 VDC. As the input voltage is reduced below 16 VDC towards 8 VDC, the input current would proportionally increase if the output power remained constant. Therefore, to keep the input filter current from exceeding the 16 VDC values, the power delivered from these low input voltage DC-DC Converters is derated linearly below 16 VDC, to 50% of rated power at 8 VDC. The user may need to consider the derating at low voltage and use appropriately rated part.

2. To allow operation at low voltage, the primary to secondary turns ratio of the main transformer was reduced, in most cases, by 50%. Reducing the primary to secondary turns ratio by 50% doubles the peak currents drawn from the input capacitors at any given input voltage. The higher peak currents cause an approximate 6 dB in crease in low frequency conducted emissions, as compared standard 28 VDC range parts. How ever, the switching frequency of the parts is increased to 300 kHz as compared to the 180 kHz to 200 kHz of the standard 28 VDC parts. This mitigates the effect of the increased input pulse current.

3. To achieve a lower voltage drop in the input switching FET despite the increased current, a lower voltage rated FET is normally used. This FET prevents the part from being used in the presence of 80 or 100 VDC surges.

4. Housekeeping voltage to start the PWM function of the converter is provided by bipolar transistor start circuit. In normal operation, a regenerative winding derived from the main power transformer takes over, bypassing the bias supplied by the start circuit. In the low voltage line, the start circuit has been modified, eliminating all unnecessary voltage drops. In addition, a constant current diode is used in lieu of a resistor in the base of the start circuit. Over temperature extremes, it takes in excess of 9.5 VDC to start the DC-DC Converter. However, once running, the converter can operate down to 8 VDC, since the regenerative winding supplies housekeeping voltage to power the PWM stage.

5. In the low voltage family of converters, the inhibit function found in the standard 28 VDC units has been changed to the "inhibit-not" function. This means that the converters will inhibit when their inhibit pin (pin 2) is connected to the input return. An open collector transistor with a minimum 20 VDC rating is recommended for this function. The "inhibit-not" function has a higher transient noise immunity than the inhibit function, therefore it was established for these units.

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MDI's Proton Rad Hard DC-DC Converters

MDI's Proton Rad Hard converters eliminate the use of optocouplers, which are the primary components that are affected by proton radiation.

In a typical DC-DC Converter application, there must be galvanic isolation between the power supply pins and the output pins. The reasons for this concern safety, noise reduction or circuit operation. In most applications, the various grounds within a system are ultimately connected to a single point ground. In other applications, the outputs of the converter are referenced to a potential different from ground.

Previously, MDI offered radiation hardened DC-DC Converters which used an internal radiation hardened optocoupler for input/output isolation. Now, in order to provide an even higher level of radiation resistance, and one that is less susceptible to unit-to-unit variations in the optocoupler, the isolation function has been replaced by an amplitude modulated RF link. This RF link transmits the amplified error signal across the galvanic isolation barrier through a small transformer. On the other side of the galvanic barrier, the RF signal is demodulated and applies the error voltage to the PWM control circuit.

Comparing the Proton Rad Hard parts to rad hard units with an optocoupler: radiation resistance is improved since the aging and parametric degradation of the optocoupler is eliminated. The efficiency of the proton rad hard converters is slightly lower (1 to 2%), since the output magnetic modulator consumes slightly more power than the optocoupler and drive currents throughout the converter have been increased for additional radiation resistance. Operating life of the proton rad hard DC-DC Converters, even without radiation, is improved over the optocoupler units, since there is no LED output degradation over time as found in the optocoupler type.

Because the magnetic modulator in the proton rad hard DC-DC Converters contains an RF oscillator, the output noise of the proton rad hard DC-DC Converters is slightly higher than that of the optocoupler types. The higher noise is in the form of a very low level 2 MHz signal uncorrelated with the output ripple. The 2 MHz signal is normally at least 20 dB lower than the output ripple.

Comparing transient response of the proton rad hard DC-DC Converters with that of the optocoupler types, the load application, load removal and response to line transients is better in the proton rad hard version. The reason for this is that the optocouplers vary considerably in initial current transfer ratio, and also over life and radiation. This means that the optocoupler units have to be compensated for a much wider range of conditions than the magnetically isolated proton rad hard units. The compensation being more conservative, the closed loop bandwidth of the optocoupler types tends to be approximately half as much as the bandwidth of the proton rad hard units. Since the recovery times from transient events is inversely proportional to bandwidth, the proton rad hard converters have better transient response.

Similarly, the turn on overshoot of the proton rad hard DC-DC Converters is essentially non existent because the circuit topology and wider bandwidth.

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Hybrid DC-DC Converters Excel in AC Applications

Hybrid DC-DC converters are rapidly dominating the next generation of high performance military and aerospace applications due to their small size.

However, physical volume reduction of miniature AC input converters have lagged behind their DC input counterparts. This is unfortunate, since many AC applications also demand the small size, light weight and high performance. By using a small rectifier and filter ahead of a suitable hybrid DC-DC converter, a very small AC/DC power supply may be implemented.

Primitive hybrid DC-DC converters were not regulated at all or had relatively narrow input voltage ranges. Second generation parts operate over a 2 1/2 :1 or 3:1 range. This is an impractically narrow range for running on highly pulsating full wave rectified AC.

For wide operating voltage range DC-DC converters, the choice of circuit topology is critical. It has been shown that the flyback topology is well suited for extreme operating voltage ranges. Reference #2 discusses a flyback construction operating over a 37:1 range.

The most common nominal voltage range for DC input units is 28 VDC followed by 270 VDC and 120 VDC. The 120 VDC range is used by the International Space Station Alpha program as well as some newer satellites. Modular Devices, Inc. is now manufacturing four families of hybrid 120 VDC input converters using flyback topology, ranging in power from 6.5 to 80 watts. The operating range of these parts encompasses 200 VDC on the high end to 80 VDC on the low end. In addition, these converters are current mode types and have a high degree of ripple rejection.

The wide operating voltage range feature makes this series of parts ideal for operating on pulsating DC derived from direct full wave rectification of nominal 115 VAC inputs.

A typical circuit configuration is shown in Figure 18. AC voltage is fed to a bridge rectifier, then to a capacitor in parallel with the DC-DC converter. For low power outputs the capacitor is not necessary since the internal capacitor of the DC-DC converter suffices

This configuration has excellent EMI characteristics. The high frequency emissions are controlled within the DC-DC converter itself. The low frequency conducted emissions are minimized by keeping the filter capacitance as small as possible. Since the DC-DC converter is designed to operate over a large input voltage range, it can cope with the high pulsating voltage resultant from a small capacitor.

A typical input waveform is shown in Figure 19. The small capacitor results in a large conduction angle. The large conduction angle provides a high power factor and allows a relatively fast fall off of low frequency harmonics.

A substantial benefit of being able to operate with little or no external capacitance is the small physical dimensions of the resulting power supply.

Tables 9 through 12 show how much minimum capacitance is needed. In practice, an additional factor of safety in capacitance value may be desirable to counter the capacitance change over temperature, increase low line operating margins or reduce output ripple voltage.

The 3050/3060/3070 family of hybrid DC-DC converters typically has 60 dB of ripple rejection with 50-60 Hz inputs and 42 dB of ripple rejection with a 400 Hz input.

With the capacitor values shown, typical full wave rectified ripple component is 0.5% p-p at 50/60 Hz., and 2.5% p-p at 400 Hz. This ripple is reduced directly as capacitance is increased. For 400 Hz applications it may be desirable to use a small inductor for filtering as this may be volumetrically better than capacitors and will improve power factor.

Battery Backup Power Supplies

The requirement to operate from an AC power line with a battery backup is often encountered in critical applications. A simple configuration for battery backed up power supplies using two hybrid DC-DC converters is shown in Figure 20. Highly compact uninterruptable or battery backed up power supplies can be implemented with hybrid converters.

AC power is full wave rectified and fed through a blocking diode to the principal DC-DC Converter, #1. This converter produces the desired regulated outputs.

A second diode connected to the pulsating full wave rectified voltage feeds a trickle charging resistor connected to a 20 cell Ni-Cad battery pack. The blocking diode is used to prevent unintentional back feed from the battery.

The trickle charge also supplies the no load current for DC-DC Converter # 2. Converter # 2 operates from the nominal 24 VDC battery output and delivers an output voltage in the 90 to 100 VDC range. This means that so long as AC power is present, DC-DC Converter # 2 is reverse biased and drawing only standby current. However, when the AC power source is low or not present, dropping below the output set point of DC-DC Converter #2, Converter #2 delivers the input voltage to Converter #1, drawing its power from the Ni-Cad battery.

The function of the oscillator/counter/FET switch is to disconnect DC-DC converter #2 from the battery after a preset time. This prevents the battery from discharging below an unusable potential.

Capacitor Selection

Capacitors should have a minimum voltage rating of 200 to 250 VDC for this application or as derating criteria demands. The user can use a film, multilayer ceramic, tantalum foil or a high performance aluminum electrolytic capacitor. All of these part types are available in a height that is consistent with the height of the converters.

The dissipation factors of the capacitors should be reviewed since they are operating with a high ripple voltage. A high dissipation factor can cause power dissipation. At 400 Hz it may be desirable to use more capacitance than indicated to reduce the converter's output ripple voltage.

References

Hnatek, Eugene R. Design Of Solid State Power Supplies, Third Edition. Van Nostrand Reinhold, New York, 1989.

Summer, Steven E. and Zuckerman, Leonard. "Wide Input Range Multiple Output Power Supply." Proceedings of the Sixth International PCI Conference, April, 1983.

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MDI's 6000 DC-DC Converter Series

MDI has introduced a new family of five types of DC-DC Converters. These "6000" series parts are derived from MDI models 2690, 3107, 2680, 3193 and 3031. The corresponding part numbers are 6690, 6107, 6680, 6193 and 6031.

The operating frequency of these parts is 270 kHz when unsynchronized, and 300 kHz when synchronized. The approximately 50% higher operating than the original parts results in a much lower fundamental output ripple for the 6000 series, typically half that of the baseline parts.

Because of the higher operating frequency, the typical efficiencies of the 6000 series parts is about 1% lower than the lower frequency counterparts.

In addition, the standard inhibit function found in the original lower frequency parts has been changed to an "inhibit-not" function, due to greater customer demand for this inverted connection. The inhibit-not features higher noise immunity than the standard inhibit function. When operating normally, the "inhibit-not" pin is open. To shut off the converter, the "inhibit-not" pin is connected to input return. This is typically performed with an open collector NPN transistor.

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Custom DC-DC Converters

Overview

The availability of custom hybrid DC-DC Converter configurations can add value to many applications, even though a custom converter generally costs more than a standard part. The user should evaluate the costs and benefits of a custom approach when warranted by the application. Customers are often unaware that hybrid DC-DC Converters can be readily modified. The use of modified converters can cut cost, size, weight and improve efficiency.

A single converter can provide a high multiplicity of outputs, using just one part to provide what might have required two or three packages. Or, in assemblies of multiple converters, custom configurations can reduce the overall package count. This can cut cost, increase reliability, save size, weight and efficiency.

In low power applications, even the smallest DC-DC Converter may have several hundred milliwatts of quiescent losses. Therefore, reducing the number of converters required to implement a requirement can be vastly more efficient using one custom converter with many outputs. Special voltage trims can also reduce or eliminate the need for external circuits, post regulators or add voltage margin for external redundant diode OR schemes.

In high power applications, two or more hybrid DC-DC Converters may be needed to achieve a given output power level. When using multiple converters, it is always desirable that they share power loading. At a high enough output voltage, it is often more desirable to place multiple converters in series rather than in parallel. The series connection provides virtually perfect power sharing without any additional circuitry. When a series connection of converters is used, it is very often desirable to have a non-standard output voltage so that the sum of the output voltages adds up to the desired amount.

Some requirements, such as power converters for MESFET RF amplifiers, need outputs which are sequenced. MDI can provide the sequencing as part of the converter.

MDI can provide DC-DC Converters whose outputs can be adjusted over a wide range, or converters that provide a constant current output with a voltage limit. Adjustable voltage converters are frequently used to program RF amplifier power levels or as lighting controllers. Constant current output converters are frequently used to charge capacitor banks.

Other design possibilities for custom DC-DC Converters include unique input voltages, ultra low output ripple, telemetry functions and BIT functions.

The following modifications are classified in order of ascending cost and lead time:

A. Minor voltage trim: An output voltage adjustment to an otherwise standard part that can be performed using a laser trim or chip resistor. The transformer windings stay Q unchanged.

B. Major voltage change: An output voltage adjustment to an otherwise standard part that requires a transformer winding change, and may also include requirements for different output rectifiers, output capacitors and output filters. However, a standard substrate is used.

C. Minor substrate change: A modification to an otherwise standard part that can be performed using wire bonding or internal wiring. The substrate wiring is changed via laser cut and wire or wire bond jumper techniques. The magnetic components usually stay unchanged.

D. Major substrate change: The designer essentially starts with a clean sheet, but may drop in proven circuit and functional blocks from existing designs. A major substrate change often requires two iterations.

Unique Input Voltage

MDI's standard product range includes the following:

8-40 VDC
a 5:1 range
16 to 24 VDC nominal
16-50 VDC
a 3.125:1 range
28 VDC nominal
86 to 158 VDC
a 1.8372:1 range
120 VDC nominal
200 to 335 VDC
a 1.675:1 range
270 VDC nominal

Within these ranges are the absolute gaps of 50 to 86 VDC and 158 to 200 VDC.

In addition to the gaps mentioned above, it is less than ideal to unnecessarily operate a DC-DC Converter near its operating limits. Each of the converter types has been designed to be optimum for the nominal voltage indicated, and provide a specified level of performance at the voltage extremes. This implies that the performance of a part may be less than optimum near the extremes of a part's range. Performance fall off can include efficiency, regulation, dynamic response, loop stability, ripple voltage and component derating.

Although a converter may operate near or at the edge of its rating, it is unwise to do so when the nominal conditions are close to the ratings. Instead, it is prudent to rewind the magnetic components and to otherwise change the design so that the converter is again optimized for the nominal input conditions.

Similarly, converters may be produced which operate over wide extremes of voltage, 10:1 ranges and greater. However, such wide operating ranges place great stresses on components. Consequently, severe derating must be used. This results in power levels for a given package size that are lower than obtainable with a standard input voltage range.

Unique Output Voltage

To obtain a unique output voltage that brackets an existing output rating, the output may either be trimmed or may require a transformer change. Most MDI hybrid DC-DC Converters have an output referenced sensing circuit. For most of the standard output voltages, the output sensing circuit is self powered directly from the output voltage. For units with a very low output voltage (less than 5 VDC) or a high output voltage (above 28 VDC), the output sensing circuit must be powered by a separate winding. This configuration exists in most MDI converter designs. However, for outputs beyond the range of self powering, a unique transformer design is normally required to derive the correct voltage for the output sensing circuit in reference to the output voltage.

Unique output voltages can include unique dual output converters and unique triple output converters. Here are some examples:

A dual output converter that produces +12 VDC and +5 VDC.
A dual output converter that produces +5 VDC and -5.2 VDC.
A dual output converter that produces +5 VDC and +3.3 VDC.

Triple output converters can be advantageously used to provide a dual output where one output has relatively low current. For example:

A dual output converter that produces +5 VDC at high current and +24 VDC at low current (This is a standard T12 configuration where the 24 is the sum of +/-12 VDC).

Triple output converters can be modified so that the main output can be a voltage other than 5 VDC. For example, a converter can produce +28 VDC at high power, +/- 15 VDC at low power. The low power outputs are independently regulated and isolated from the high power winding.

Triple output converters can also be modified to produce two auxiliary outputs with a positive polarity. The auxiliary voltages can be dissimilar.

Low Output Ripple

All MDI DC-DC Converters have an output common mode inductor to reduce output spikes. The common mode inductor is designed to have low differential inductance because output voltage is sensed beyond this inductor, at the output pins. However, it is possible to trade some slightly increased load regulation for a lower fundamental output ripple by internally rewiring the converter's sense point and increasing the differential output inductance.

This technique works well provided the effects of AC modulation on the DC input line (ie., conducted susceptibility) do not predominate in the output ripple response.

MDI has also provided output filter hybrids, which are capable of reducing output ripple and noise to extremely low levels.

High Audio Rejection

Some applications require a very high degree of isolation from input effects to the output voltage. A conventional DC-DC Converter with current mode feedback will provide 50 dB to 60 dB of audio rejection from input to output. The EMI filter typically adds (ie., reduces the rejection) by 10-20 dB at certain frequencies.

If the rejection is desired at low or audio frequencies, the rejection provided by a single regulating loop might not be sufficient. In this event, a second regulating loop is required. While the primary regulating loop is always the pulse width modulation (PWM) loop, the second regulating loop can be either switching or linear. For example, in a system two converters may be cascaded. While this is usually a bad practice in most instances (see application note on cascaded converters), one benefit that is provided by cascaded converters is the reduction of audio susceptibility.

In a standard triple output converter manufactured by MDI, the main output is PWM regulated and the auxiliary outputs are linear regulated from header voltages derived from the main output. This is an example of dual regulating loops. There will be an extremely high audio rejection on the auxiliary outputs because of the two regulating loops in series.

In constructing higher power solutions with high audio susceptibility rejection, a low drop out linear regulator stage is still useful. This may either be incorporated within the hybrid or be external. When the regulator is external, the output voltage of the hybrid DC-DC Converter may be increased to provide adequate head room for the regulator's operation.

Output Sequencing

DC-DC Converters frequently power GaAs FET RF solid state power amplifiers (SSPA's). MDI has designed and manufactured many different DC-DC Converters for driving GaAs FET SSPA's in space applications, using several different topologies for this purpose. These amplifiers require that on turn on, the negative gate bias voltage appears first before the positive drain voltage is applied. On turn off, the negative gate bias must remain on while the positive drain voltage is removed.

The basic power converter for higher power SSPA applications (up to 100 watts in hybrid form) is derived from a unique MDI model originally used to power the main X band SSPA in the JPL Mars Pathfinder project.

The key features of the higher power design are as follows:

1. The power stage topology is a 200 kHz. current mode flyback converter, which has good rejection of input variations.

2. A single flyback converter stage is used for all positive and negative outputs.

3. Output sequencing and inhibit is achieved with output FET switches.

The basic power converter topology for the lower power (up to 30 watts in hybrid form) SSPA applications is derived from an MDI model originally used to power a backup SSPA in a space application. The low power topology has fewer parts, so it is more suited for low power applications. However, there is slightly less control over the sequencing delays than the higher power topology. The basic low power sequenced topology is a 200 kHz. current mode flyback converter, combined with a low power forward output. This combination of flyback and forward modes allows a naturally simple sequencing with a minimum of parts.

The negative output voltage is derived from a forward connected winding, also using a linear regulator. The positive outputs are derived from flyback windings. The principal of this topology relies on obtaining tight coupling between the flyback transformer primary and the forward winding. The initially very narrow spikes of the FET are peak detected and allow the forward voltage to appear first at turn on. The flyback voltages rise more slowly. This creates the turn on delay.

When power is removed, hold up capacitance supplies the negative output while the other outputs decay.

Since sequenced hybrid DC-DC Converters are not listed in MDI's catalog, consult MDI's sales and marketing department for specific requirements. The sequenced converter needed for your application may have been previously developed.

Adjustable Output Converters

Many applications require a variable output voltage that is commanded by an external signal. The signal is usually a voltage referenced to the output return. Applications for variable output converters include adjustable RF amplifiers, lighting controls, capacitor charging power supplies, battery chargers and constant current sources. The topology of the standard MDI hybrid DC-DC converters is a current mode flyback. This topology is highly suited for achieving a wide operating range, so is a good choice for an adjustable output unit.

MDI's standard hybrid DC-DC Converters are designed primarily for a fixed output voltage. Adjustments of up to ten percent in the nominal output voltage are achievable without unduly compromising the operating points. The standard converter design relies on the relatively fixed output voltage. For maximum efficiency, the input PWM stage is started by a transistor connected to the input line, but powered by a housekeeping winding when the converter operates. Similarly, the output voltage sensing circuitry is normally self powered from the output. If the output voltage varies considerably, the housekeeping winding will not be available to power the input PWM circuitry and the output voltage will not be available to power the output sensing circuitry.

To obtain a variable voltage converter, the start up circuit must be modified so that it powers the input PWM circuitry at all times. This results in slightly lower efficiency. In addition, the output sensing circuitry must be powered by a separate winding, as it usually cannot be self powered if the output voltage varies significantly. If the input voltage variation is relatively low, the output sensing circuits can be powered from a forward phased winding. Alternatively, a flyback phased winding with a linear regulator may be used.

To extend the operating range, it is sometimes advantageous to program the operating frequency downward as the output voltage is programmed downward. This gives an enhanced dynamic range.

Current sources derived from hybrid DC-DC Converters are similar to adjustable output DC-DC Converters. In this case, the output current is sampled and compared to a reference. The amplified error voltage between the reference and the measured current is used to drive an adjustable output DC-DC Converter. It is also possible, by varying the reference voltage, to obtain an adjustable constant current source.

Because of the flyback topology and construction techniques used, MDI's product line lends itself to economically producing custom configurations. This can include special packages, up to ten regulated outputs, units with hold up, units with telemetry, low power with high efficiency and also DC to AC inverters.

To start a dialog on the feasibility of a custom hybrid DC-DC Converter with MDI's Engineering Department, fill out our contact form.

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Assemblies of Hybrids

Board Mounted Converters Vs. Assembly of Hybrids

Before the availability of miniature modules made distributed power architectures popular, multi-output power supplies were usually concentrated in centralized power supply boxes. The power supply contained one or more inverter stages. Regulated sub-outputs were either PWM derived, obtained from magnetic amplifiers or linear regulator post regulators.

Hybrid DC-DC Converters are often associated with distributed power concepts. Distributed power is a system where local converter/regulators are used instead of a centralized power supply. In the distributed system, bus voltage is fed to individual subassemblies. The hybrid DC-DC Converter modules are packaged within the subassemblies, and created the regulated and filtered voltages needed by the subassemblies locally. Many hybrid DC-DC Converters are used in applications such as this.

However, the centralized power supply assembly has not been eliminated by the availability of modules, but is instead often constructed out of assemblies of hybrids. Centralized power supplies are often contained on plug in assembles such as VME racks and SEM modules. The centralized box approach still offers advantages in many applications. In some cases, the power supply needs to be physically or electrically isolated from the load because the load is sensitive to electrical noise, the heat generated by the power supply or some other aspect. A centralized assembly also provides the user with an LRU (Line Replaceable Unit) format with heatsinking and connectors.

Now that a wide range of hybrid DC-DC Converters are readily available, many users are constructing their own centralized power supplies and assemblies using modules. can deliver, is needed, an assembly of hybrids offers fewer advantages.

When are Assemblies of Hybrids Better than a Custom Power Supply?

A number of considerations lead the choice to use an assembly of hybrids instead of a full custom power supply. First consider the total number of outputs and the power level of each output. Assemblies of hybrids are more suited for higher number of outputs with each output at relatively low power. When only one output, or a small number of outputs, at a power level considerably higher than single hybrid DC-DC Converters can deliver, is needed, an assembly of hybrids offers fewer advantages.

Second, consider the quantity of units to be produced to weigh the development cost and availability of development talent versus the production cost. An assembly of hybrids tends to have a higher unit cost than a non-modular power supply. However, an assembly of hybrids will require far less design time than required to develop a non-modular power supply. With the building block approach of using multiple hybrids, the majority of the development work has been done, and is embodied within the hybrids. For lower quantity applications, an assembly of hybrids can be very cost effective.

In addition, assemblies of hybrids offer the benefit of previously developed documentation because of the building block approach. MDI can provide interface, source and specification control drawings for its hybrid DC-DC Converters. Many MDI hybrid DC-DC Converters have a full set of detailed analyses available.

Multiple output power supplies built with single inverters and post regulated outputs often suffer from cross regulation effects. These effects are exacerbated by dynamic conditions. Better isolation between outputs is provided by assemblies of hybrids, due to individual regulating loops.

In comparing between a power supply with a single inverter and an assembly of hybrids, the former has a lower parts count. However, the assembly of hybrids can still offer smaller size and weight due to elimination of intermediate packages and higher frequency operation. Also, assemblies of hybrids are generally more robust than multi-output power supplies built with a single inverter. This is because the physically smaller elements of the hybrid DC-DC Converter have a higher shock and vibration resistance than the larger, discrete elements.

Additional Functions

Assemblies of hybrids provide additional functions beyond just packaging hybrids in a housing. These functions include the following:

Bus Switching:

Power supplies are often powered from redundant power buses. Relays of solid state switches are needed to select the desired power bus. If relays are used, the voltage rise time presented to the DC-DC Converters will be very high. In this event, some form of inrush current limiting will be needed to avoid loading down the power bus and to avoid damage to the relays.

Inrush Current Limiting:

When powered by a voltage source having a fast rise time, large current spikes can flow to charge up the input capacitance within the hybrid DC-DC Converter. Active circuitry can efficiently slow the rise time of the input voltage, minimizing input inrush currents.

Fuses/Circuit Breakers:

Fuses or circuit breakers (either mechanical or solid state) are often needed on the input power lines to prevent failures from propagating to the power bus.

Reverse Polarity Protection:

This function is often desired to prevent damage to the assembly during evaluation and test. Protection against damage caused by reverse polarity is normally never needed for the actual application with the exception of vehicles.

Input Hold Up:

The assembly can provide energy storage which allows power to be delivered for a certain time even if input power sags or is interrupted. This function often requires reverse polarity protection to prevent the stored energy from feeding the interrupted power line.

Additional Input Filtering:

When using several converters in an assembly, the input EMI emissions can add algebraically if they are synchronized. Therefore, in an assembly of multiple hybrid DC-DC Converters, it is often desirable to add supplemental input filtering to ensure that the overall assembly meets its EMI specifications. Care must be taken not to add too much impedance, since added impedance preceding a switching regulator may cause "Middlebrook" criteria type oscillation.

Additional Output Filtering:

When ultra low output ripple is desired, additional filtering between the converters and the load can be added in an assembly. The desired frequency spectrum of the output determines the type of filter used.

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Space Power Supplies

Spacecraft and satellites have self contained electrical power systems derived from batteries, photovoltaic arrays, fuel cells or radio-isotope generators. This power may be unconditioned, or may be conditioned to a regulated bus level, from which several to several hundred converters must efficiently convert the power for end users.

The principal issue facing space power supply applications is that extremely high MTBF must be achieved with quantities that are relatively low, compared to other power supply applications. The low quantities hamper learning curve (experience) driven improvements. The methodology evolved for the design and construction of space power supplies has overcome the constraint of low quantities.

Several tried and true techniques have been established to resolve this issue.

One important method is the use of "heritage" designs. These are designs and processes that have successfully flown on other spacecraft. To the extent that the new application provides the same environment as the heritage environment, there is a lot of validity to this approach. The disadvantage of this approach is that it is much less useful as the time span between the new requirement and the heritage application widens. The idea of using heritage attains its greatest benefit within just a few years after the heritage application. If the use of heritage based on designs one or two decades old occurs, the benefit becomes a detriment.

Preferred parts lists solely based on heritage may lag the present day by twenty to thirty years. Many of the components may be commercially obsolete, leading to lower reliability. The equipment becomes heavier and larger, leading to other design compromises. The manufacturing processes to make the piece parts accumulate change over the years, invisible to the activities maintaining the preferred parts list.

Another important technique to improve reliability is the separate qualification of piece parts. This may be performed on discrete parts as well as hybrid and chip elements. The piece parts are qualified to environmental levels much higher than they will experience within the completed assembly, giving a factor of safety to the designer. Designs sometimes are less reliable than they might be because some aspect affecting reliability has been overlooked. This can be avoided by complete review and scrutiny. This oversight requirement can be satisfied by the submission of complete and comprehensive drawing packages. This is also necessary to assure control of the configuration.

To supplement or as an adjunct to any overall testing program, various analyses should be performed. These analyses verify that all piece parts are properly applied and that the customer's overall expectations for reliability will be achieved.

Also, as part of an overall quality system, all manufacturing and design processes should be documented. Where necessary, such as soldering, all operators should be trained and certified.

Space applications tend to have environments that are unique to each application, in contrast to aircraft, shipboard, vehicle and fixed uses. Radiation effects including total dose and SEU depend on the orbit as well as time on orbit. Deep space application have unique radiation requirements. Temperature cycles and extremes depend on the spacecraft's thermal control system as well as the location of the power supply.

Shock, vibration and pyrotechnic shocks also tend to be unique to the application.

Since space power supplies need to operate in a vacuum environment, all dissipative elements need predictable paths to the thermal sink. This is sometimes overlooked by neophytes.

Most spacecraft applications contain optical and other systems that are affected by out gassing of volatile materials. Therefore, all materials must be categorized and selected for low out gassing.

Packaging Design Choices

Space Power Supplies can be fabricated with all discrete piece parts, fully in hybrid microcircuit form or a mixture of both. The mixed construction can also consist of a number of self contained hybrid DC-DC Converter modules in a housing. In determining which approach is best, both technical requirements as well as cost and schedule must be considered. Normally, a full hybrid approach is more expensive and takes longer to develop than a part hybrid or full discrete design. However, this applies to units that are essentially custom. When requirements can be derived from standard or previously developed designs, the cost and schedule picture can dramatically change for the better.

Full hybrid power supplies using thick film substrates, chip and wire semiconductor die and surface mount components contained within hermetic enclosures allows the ultimate in packaging density. The elimination of individual piece part packages also improves overall reliability. Resistors are screened and fired directly on the ceramic substrates, and are tailored in size for their exact wattages.

The hermetic enclosure simplifies many environmental concerns and provides an excellent dormant storage life. The low mass of the chip components allows the full hybrid converters to withstand shock, vibration and acceleration that is considerably higher than tolerated by discrete units.

One drawback for full hybrid construction is that full MIL-STD-981 magnetic component construction is not possible due to size constraints. This includes the aspects relating to terminal design and encapsulation. However, most of the MIL-STD-981 requirements can be retained.

Full hybrid construction is best suited for output powers up to 120 watts at the present. Above this level, thermal considerations of the major dissipators (semiconductor die and magnetic components) make it more practical to use separate packages at higher power levels.

Above the optimum power level for full hybrid construction, it is advantageous to mix hybrid construction with discrete parts. Discrete construction also encompasses surface mount piece parts and techniques.

In this mixed construction, the low power, complex circuits are contained within the hybrid. The higher power and bulkier components are packaged separately. This gives good volumetric efficiency and allows better thermal paths for the higher power dissipators.

Mixed hybrid and discrete construction is best suited for power levels from 50 watts to 1000 watts. This is the most compact construction that can offer full MIL-STD-981 magnetic components. In addition, the mixed construction allows mechanical provisions for EMI filtering, such as EMI plenums, making EMI filtering easier to implement than in full hybrids.

An advantageous variation of the part hybrid/part discrete approach is to combine a number of complete hybrid DC-DC Converters in an assembly, which can also include some small amount of discrete circuitry. This building block technique allows rapid development of complex units at a minimal cost.

Full discrete construction is suited best for high power applications as well as full custom applications that must be implemented with out dated preferred parts lists. In a high power situation, the size and weight savings produced by the low level hybrid microcircuits are not significant. Full discrete construction is applicable from several hundred watts to the kilowatt range.

One of the most important aspects of selecting a construction method is not technical, but depends on factors that are intangible. Inherent in the conservative structure surrounding many space requirements is the strong resistance to change.

Many recent programs are mandated to be "better, faster, cheaper," and attitudes toward using more modern packaging design are gravitating toward full hybrid and part hybrid designs as the power level permits.

Construction Techniques

In fabricating space power supplies, great reliance is placed on documenting detailed procedures for all manufacturing operations, as well as training and certification of all operators. Quality requirements such as NHB-5300 and MIL-Q-9858A mandate procedures for all manufacturing operations.

The purpose of the procedures is to allow review of the operation, consistency in its application and as a criteria for training.

For a typical hybrid manufacturer approximately 40 procedures may be required. For magnetic component manufacture, approximately 20 procedures may be required. For discrete assembly, approximately 30 procedures may be required. The hybrid procedures are written around MIL-H-38534, the magnetic procedures around MIL-STD-981 and the discrete assembly procedures are based on NHB-5300.

The operators performing these procedures are trained (in accordance with a training procedure), tested on their knowledge and ability to perform the procedure, then are certified for that procedure. Outside agencies have cognizance of the certification of procedures as well as instructors, which is renewed at periodic intervals.

The intent of generating all these procedures and methods is that nothing be left to chance or to interpretation. This overcomes part of the learning curve that would otherwise occur with a small unit quantity.

Piece Part Selection and Qualification

One of the distinguishing features of space power supplies is the care with which piece parts are selected.

Various preferred parts lists (PPL's) exist, many derived from MIL-STD-975. The advantage of using parts from these lists is that they represent mature parts with considerable heritage. The disadvantage of these lists is that the piece part and packaging technology is from ten to twenty years old. This produces units that are larger, heavier and less competitive than more current practice.

A phenomenon that must be unique to the space industry is often observed in designs based on PPL's. This is circuit design based on unique combinations of minimum types of so called standard parts. It's analogous to logic designs built entirely with NAND gates, or to linear circuits built entirely with NPN transistors.

The motivation for these types of designs is not only using parts on the PPL's, but also the monetary costs for minimum lot costs of the parts.

Very often, large excess amounts of space qualified piece parts have been purchased on earlier contracts, and the designers are mandated to use these parts until stock on hand is depleted. The resulting designs are very often non-competitive.

Competitive space power supplies will inevitably use some quantity of what are termed "non-standard" parts. This may include parts that are military standard but not on the PPL, or parts that are custom, such as magnetics. For a full hybrid design, all chip components may be considered non-standard.

The typical procedure for using a non-standard part begins with the generation of a source or specification control drawing. This document not only specifies all the electrical and mechanical parameters of the part, but also defines the qualification and quality conformance requirements. When generated for chip components, these drawings may be called detailed device specifications. Qualification is the initial testing that qualifies the part to meet the requirements of the drawing, and usually includes environmental testing as well as electrical testing. Quality Conformance Inspection testing (also known as QCI) qualifies the particular lot of parts, and is usually done at periodic intervals. QCI normally has a smaller subset of tests than qualification testing, so is less expensive. QCI is also known as group A, B, C, D and E testing. Depending on the type of parts, the "group" testing may be just group A and B, or A through E. In the QCI process, one or more units are destroyed, adding additional expense. There are various strategies for reducing QCI cost, which require the informed direction and approval of the customer.

The qualification process for chip components is called element evaluation, and is performed in accordance with MIL-H-38534. This is also used for quality conformance inspection.

Magnetic components for space power supplies are almost invariably non-standard. The usual governing specification for magnetic components is MIL-STD-981, which builds on MIL-T-27 and related specifications. Like many other detailed parts specifications, MIL-STD-981 allows qualification (not QCI) by similarity, provided the "similar" part meets certain tests of "closeness" with the previously qualified parts. This permits cost savings in many instances.

After the piece parts have been documented, qualified and built, the parts may be subjected to a further screening known as Destructive Physical Analysis (DPA). DPA is a process wherein representative parts from a lot are dissected to verify construction meets detailed requirements. If the samples from the lot pass the DPA, the entire lot is accepted. If they fail, the entire lot is rejected or otherwise dispositioned. Many piece part specifications have specific DPA requirements. However, it is not unusual to impose other specifications, such as MIL-STD-1580, which have other DPA requirements. Sometimes, the specific requirements differ and a part that meets its detail requirement will not meet an overall DPA specification. Resolving these specification conflicts is a usual recurrence.

The economic and schedule result in requiring QCI and DPA's on discrete components often results in a full hybrid construction being less expensive and more readily available than discrete construction since element evaluation is a quicker process than QCI on many discrete items.

Documentation

Space Power Supplies require extensive documentation efforts for two general reasons. The first may be considered in the nature of design disclosure. This allows the customer to thoroughly review the design and construction prior to hardware fabrication, as well as to review results of testing prior to actual use. The second is to document all aspects of the unit to allow configuration control and to assure that the unit was built exactly as intended.

A comprehensive documentation program may be streamlined by drawing heavily on existing documentation. It is important to distinguish between customer review of existing documentation and customer review and approval of existing documentation. The former has modest cost impact as no drawings or procedures will be changed. The latter has greater possibility of cost impact since changes are usually inherent in the approval.

Drawing packages are generated to DoD-STD-1000 guidelines. There are three levels of drawing packages in this document, Level 1, 2 or 3. Level 1 is an engineering drawing package, and is intended for the purposes of design disclosure. This level of drawing may be inadequate for this purpose when depicting space power supplies.

Levels 2 and 3 are suitable for use to document configuration control, as differentiated from design dis-closure packages. Level 3 is the most comprehensive, and theoretically gives sufficient information for re-procurement if necessary.

The types of drawings contained in a Level 2 or Level 3 package follow a hierarchy, starting with the outline/installation drawing, next the top assembly drawing, then the lower level assemblies. This is followed by detailed fabrication drawings. When components are purchased, the drawing package includes source and spec. control drawings. These are supplemented by schematics, block diagrams, manufacturing procedures, etc. Very often, due to schedule requirements, there will be more than one configuration supplied. In that even, "as built" drawings are provided, depicting specific configurations.

Many of the parts will be covered by specification control drawings or source control drawings. The former type is used when the requirements are not highly critical and source qualification is not deemed mandatory. The latter restricts procurement of the part from approved sources. Source control drawings usually list requirements which must be satisfied to qualify a part.

In practice, source control drawings are frequently preferred over specification control drawings when the specifier is aware of undefinable parameters that are important or that only one acceptable source exists. Another reason for source control drawings may be that the specifier knows the recommended source has unique test equipment or capabilities not available elsewhere.

Schematics and block diagrams are used as tools for design reviews and later analysis. With space power supplies, if any repairs or modification is required, only the original source should be entrusted with this work, so schematics and block diagrams are not needed as submittals for customer maintenance.

Block diagrams and schematics are also useful in conjunction with theories of operation, which describe how a unit operates.

Plans, procedures and reports are another important area for documentation. These documents control the testing of space power supplies.

Test plans are an important part of any test program. It is not correct to assume that specifications covering environmental or EMI testing are in themselves sufficient for conducting tests. What is missing is the mechanical configurations, electrical connections, ambient conditions and pass/fail criteria. These elements must be reviewed by the test activity as well as the customer prior to conducting the tests. The test plan is the vehicle that describes the missing information prior to test execution.

When the test plan is approved by the customer, a test procedure is generated, covering the actual testing. This embodies the elements of the test plan. The test procedure describes the testing in greater detail, listing the equipment or facilities to be used as well as the sequence of testing.

Following the actual testing, a test report is generated. This describes the test results, and is often accompanied by photographs. If any anomalies have occurred during testing, this is noted in the report.

Analysis

Although many aspects of the space power supply's design are best characterized by testing, some areas also demand substantiation by analysis, which establishes the design margins.

In the development of a space power supply, the most frequently required analyses are circuit (SPICE), electrical stress, thermal, derating, worse case, MTBF, FMECA, EMI, environmental and radiation effects.

There is a hierarchy to these analyses, and just like in college courses, many have prerequisites.

The fundamental analysis is the circuit analysis, which usually employs a form of SPICE Modeling. The SPICE Model establishes the operating points and provides a sound analytical framework for later work. For a power supply, the SPICE Model gives data on the stability of the closed loop.

Using the SPICE Model to confirm operating points over a range of conditions, the worse case electrical stress for each part can be computed. Many parts have several parameters which must be assessed. For example, for a capacitor, working voltage as well as ripple current must be determined. For a resistor, it is power rating as well as maximum current or voltage. For diodes, it may be reverse voltage, reverse current, forward current and AC effects. The electrical stress information for all of the parts feeds into the thermal, derating and worse case analyses.

For the thermal analysis, the power dissipation for each part is computed. The goal of the thermal analysis is to determine how hot each component gets and verify that the computed temperatures meet design requirements. Since space power supplies are required to operate in vacuum conditions, heat removal is limited to conductive cooling and radiation. Practically, radiation is not significant.

One of the most useful tools for thermal analysis is the finite element analysis technique. This is represented by programs such as ALGOR FEA. The method of analysis proceeds in the following sequence. All heat paths are characterized. The physical construction is broken up into infinitesimal elements and the heat flow is computed by matrix manipulation. The resulting output of these programs is a node listing which can be portrayed as isothermic lines. This allows the hot spot temperatures to be readily seen.

If a component exceeds its required temperature, the thermal design can be iterated and the analysis re-run.

The thermal analysis and electrical stress analysis feed into the derating analysis. Overall specifications, such as MIL-STD-975 and related specifications, impose derating limits for piece part application, many being temperature dependent. The derating analysis is usually in tabular form, comparing each piece part's rating with its stress level. Often a customer will only explicitly need the derating analysis, however, the SPICE Model, electrical stress and thermal analysis are all required for a meaningful input.

A worse case analysis may take the SPICE Model and vary the tolerances of the various components in a random way. This is also called Monte Carlo analysis. Or, the drift of component tolerances may be assessed for an End of Life analysis. This type of analysis predicts how the power supply will operate at the end of a long duration, for example a 30 year Space Station application.

MTBF (Mean Time Before Failure) analyses predict the failure rate of the space power supply. Using mostly experiential information and methods derived from MIL-HDB-217, and drawing on the temperature and electrical stress levels derived from earlier analyses, the failure rate may be computed. Computer programs to perform the computation are available. Simplified assessments using only the parts count are possible. However, they are not as precise as the actual stress method. Clearly, the electrical stress and thermal stress of the piece parts must be determined to accurately predict MTBF.

FMECA (Failure Modes Effects Criticality Analysis) is often required to be performed for a space power supply, as this allows more reliable units to be achieved. A knowledge of the functional operation as well as the failure rate of each piece part is needed to prepare a FMECA. Therefore, the MTBF and all subsidiary analyses are required for a FMECA.

EMI analyses are often required as an adjunct to testing. The benefit of an EMI analysis is that it may be performed before hardware is constructed, or may assess areas that may be difficult or costly to test. EMI analyses are often based on SPICE Models. Filter configurations may be readily modeled, as well as parasitic effects. This gives the designer a look ahead so that the design can anticipate and solve EMI problems before the (possible) long lead hardware is assembled.

Environmental analyses primarily consider the effects of mechanical inputs to the power supply, including vibration, shock and acceleration. These are most useful before actual hardware is built, although analysis may also help to fix inadequate mechanical designs. Finite element analysis techniques are mostly used, with the worst case elements modeled.

Radiation effects analyses consider the known effects of radiation on piece parts, such as the Vgs shift in power MOSFET's and the leakage current increases in semiconductors due to radiation induced defects. These analyses are based on the SPICE Model and the worse case analysis.

Testing

The purpose of a test program is risk mitigation. Unlike terrestrial power supply applications, environmental testing is performed in conjunction with analysis, not as an either/or situation. Testing alone may not reveal design margins or weak spots. Analysis alone may be flawed. Therefore, a balanced combination of analysis and testing is generally favored. The most significant tests are usually shock, vibration, thermal vacuum, EMI and radiation.

Most applications for space power supplies have a relatively benign shock and vibration environment on orbit, but a severe requirement during transportation and launch. Pyrotechnic shocks are normally the most challenging requirement for low mass units.

Thermal vacuum testing is another important area that cannot be confirmed without testing. Every heat dissipating component must have a reliable path of conductive heat removal. Many power supplies designed for non-space use neglect this necessity, and so fail when exposed to the hard vacuum environment of space.

EMI is another important area that varies widely from application to application. Because of the small capacity of most space electrical bus systems, there has been little standardization of bus specifications. This translates to a wide diversity of EMI requirements. Test plans, always important, assume an even greater importance in light of this diversity.

Radiation effects are normally tested on piece parts because of the great expense involved in testing complete units. The piece parts tested are those that are known from experience to be most susceptible to radiation. In addition, since relatively few facilities can perform tests such as SEU resistance, long lead times and high costs for testing are common.

Successful testing programs characterize the equipment with minimal cost and schedule impact. One of the best ways found to facilitate this is to precede a formal qualification test program with an informal pre-qual program.

A pre-qual program is designed to hit the hot spots, or technical high risk areas of the development task, at an early stage in the program and at a modest cost. An assessment is made of the highest technical risk areas, and only those areas are tested. Test plans, procedures and reports are kept informal, which holds down costs. Source inspection is not invoked, streamlining the schedule. A pre-qual program can be performed with a brassboard, prototype or pre-production unit, and does not require flight level hardware.

A pre-qual program has two benefits. If it precedes a formal qual program, it gives early assurance of a satisfactory design. If testing shows that changes are necessary, changes can be made on non flight hardware, avoiding the high costs and long lead times of flight hardware.

The second benefit exists when the next higher assembly beyond the power supply will be subjected to formal qualification tests. In that event, the pre-qual program will give reasonable justification for combining the formal qualification test of the power supply with the testing of the next higher assembly.

Conclusion

Space Power Supplies cannot be practically repaired after deployment. Over the years, a body of knowledge has developed that offers guidance for producing highly reliable supplies. In the transition to smaller, faster and less expensive power supplies, it is important to use good judgment to wisely achieve these goals without fatally compromising the mission reliability.

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MDI Model Specific Application Guides
MDI's 5080 Point of Load Regulator

The 5080 series are radiation hardened, non-isolated, synchronous switching buck point of load (POL) regulators.

Non-isolated DC-DC converters are three terminal devices, having an input terminal, an output terminal and a common terminal.

Buck converters generate an output voltage that is lower than the input voltage.

In simplest form, the buck converter uses a FET, a diode and an inductor.

In order to obtain higher power efficiency, the rectifying diode in the non-isolated DC-DC converter is replaced with a second FET. The forward voltage drop of the diode is usually higher than the drop across the second FET, therefore power losses are lower. The FET must be switched in synchronism with the waveform that would appear across the diode. Therefore, DC-DC converters that use a second FET to perform the action of the diode are called synchronous rectification devices.

Simplified Block Diagram

The block diagram of the model 5080 shows that input power is applied to an upper power switch. The switch is driven at a 100 kHz rate by the pulse width modulator (PWM) circuit.

The switched waveform is then fed through the Buck choke.

A lower switch is connected in parallel with the output buck rectifier. The lower switch is connected between the upper switch output and ground.

The ripple filtered output passes through a common mode inductor to reduce output spike voltages. The external damping capacitor is supplied by the user to optimize load application and removal transients as well as to lower the output ripple.

The output voltage is passed through the output sense circuit, which permits voltage sensing directly at the 5080's output pins for best static load regulation.

Input pins are provided for external sync (this can also be used for phase staggering of multiple 5080's), an inhibit pin and a voltage adjust pin. Output pins include a 5 VDC voltage reference (for output voltage adjustment, a BIT analog output and a current telemetry output (useful in paralleling multiple converters).

Simplified Block Diagram

Input Voltage Source:

The 5080 converters are intended to operate from an intermediate bus. This intermediate bus is a voltage of 11 to 16 VDC (with a preferred voltage of 12 VDC) that is supplied by another, front-end power converter. The front-end power converter developing the intermediate bus is exposed to the bus variations and transients. Also, it is expected that the front-end converter will accommodate the MIL-STD-461 type EMI filtering requirements of the system as applicable.

Although the 5080 converters do not contain full internal EMI filters, they do feature common mode filtering on input and output power lines. This provides a substantial reduction of voltage spikes.

A fully loaded 5080 module can draw up to 1000 mA ripple current at its switching frequency of 100 kHz. Therefore, any front end DC-DC converter should provide appropriate decoupling capacitance at its output terminals to supply this maximum ripple current. A minimum input decoupling capacitance of 30 microfarads (ceramic MLC or low ESR types) per 5080 module is recommended.

For most applications, an input voltage source that is nominally 12 VDC will provide the best electrical performance. A nominal 15 VDC source may also be used, however, the conversion efficiencies will be slightly lower.

Output Voltage:

There are nine 5080 models that produce a positive output voltage. Output voltage types and adjustment ranges are shown on the 5080 data sheet.

Output Current:

Output current of the 5080 units is limited to 4 amperes or to the current produced at 10 watts output (considering the nominal output voltage), whichever is lower. The maximum output current is constant current limited.

External Output Capacitance:

Due to the small size of the 5080, the internal output capacitance is limited in value to that necessary for high frequency filtering. For good load transient response, the 5080 data sheet shows a recommended minimum and maximum external capacitance that should be supplied by the user or present in the user's load. The use of low ESR types, such as multiple solid Tantalum chips in parallel is encouraged, as ripple voltage will also be reduced.

Output Voltage Temperature Coefficients

Voltage limits for Model 5080 parts shown in the MDI data sheets are the nominal 25°C values. At temperatures outside 25°C, the output voltage may vary ± 100PPM/°C maximum with base temperature.

Output Ripple

Due to its small size, the internal capacitance of the 5080 is limited. For good load removal and load application response, a minimum value of external capacitance is recommended.

When selecting external capacitors, low ESR solid tantalum capacitors are preferred. Capacitor leads with excessive series inductance should not be used, since this will add impedance and negate the benefit of the external capacitance. Relatively large amounts of external capacitance may be added, but do not exceed the data sheet guidelines without consulting MDI.

Four Terminal Capacitor Method for Improved Filtering

To reduce high frequency spikes, multilayer ceramic capacitors in surface mount chip form can be used. For best results, the capacitor should be connected as a four terminal device. An external series common mode inductor or ferrite beads can also be used between the converter and the capacitor.

Output Ripple Vs. Temperature

The fundamental output ripple of the 5080 converters is primarily dependent on the absolute capacitance value of the external output capacitors (when the output capacitors are multilayer ceramic types), or the ESR of the output capacitors (when the output capacitors are solid tantalum types). The selection of output capacitor depends on the output voltage and type of converter. However, the following effects occur at temperature. For units using ceramic output capacitors, the capacitance falls off sharply at high and low temperature extremes. Although the low ESR of ceramic capacitors results in very low ripple voltages, it is not unusual for ripple voltage to double at the high and low temperature extremes. For units using solid tantalum output capacitors, the ESR also rises sharply at low temperature extremes. Therefore, users should conservatively assume a ripple temperature coefficient of 1% per °C increase over the 25°C base numbers.

Short Circuit and Overload Protection

Model 5080 DC-DC converters contain constant current limiting for protection against inadvertent output short circuits and overloads. The current limiting set point is approximately 125% of rated output current.

Output Over Voltage Protection

Model 5080 DC-DC converters do not contain any internal over voltage protection circuitry. If this function is required, the user should implement it externally. Because the 5080 is non-isolated, in the extremely unlikely event of a failed shorted switching FET, the input voltage could appear at the output pins. If warranted, external OVP should be used.

Output Load Transient response

The output load removal and load application transient voltage is a function of the external capacitance and the magnitude of the current step. The following table lists the magnitude of the output voltage transient for a 25% to 75% rated load change, with the minimum recommended external capacitance.

Back Voltage

A back voltage may be applied to the output of the 5080 DC-DC Converter, whether it be energized or de-energized. Up to 20% above the output voltage rating may be safely applied.

Pin Functions

Voltage Reference (Pin 13)

The voltage reference pin is primarily used for downward voltage adjustment of the output. However, it may also be used for other applications. Up to 10 milliamperes may be drawn by the user. This current, if used, is ultimately drawn from the input voltage.

Output Voltage Adjustment (Pin 14)

The adjust pin function (pin 14) allows the user to set the 5080 output voltage slightly above or below it's initial set point. The recommended adjust range for each part type is listed in the data sheet.

When trimming for an increased output magnitude the adjust resistor is connected to the common ground. When trimming for a decreased output magnitude the adjust resistor is connected to the V ref pin (pin 13).

The adjust pin is connected to an internal 10K resistor, whose purpose is to prevent damage to the internal circuits and to reduce noise pickup.

The following table gives applicable resistor values for each 5080 type, as well as which equations to use to calculate the external adjust resistor value. For purposes of computing the external adjust resistor power dissipation, a maximum of 2.5 VDC appears across the external adjustment resistor.

If the external adjust feature is not used, both the adjust pin (14) and the V ref pin (13) should be left unconnected.

When the converter is adjusted upwards, the output power should be limited to 10 watts, or the output current should be limited to 4 amperes, whichever is less.

Equation 1A

Equation 1B

Equation 2A

Equation 2B

Equation 3

Output Current (Pin 15)

An analog of the output current is provided in pin 15. This is useful in paralleling applications.

Model 5080 Pin 15 millivolts
per output ampere scaling

Connecting 5080 Units in parallel for higher output current

The outputs of like converters may be connected in parallel to support higher load current requirements. They will not, however, share the output load to any determinate extent without interconnecting the paralleling pins provided for the purpose.

5080 converters may be configured to share total current of higher current loads to within nominally ten percent by interconnecting the parallel in and parallel out pins. One of up to five 5080s should be selected as the "master" and the other 5080's as the "slave(s)". Connect the parallel out of the master to the parallel input of the slave(s). Paralleled units should be located physically close to each other to minimize wire drops.

In this scheme, external ballasting resistance and external circuitry can be avoided and very satisfactory load current sharing achieved.

Output "OR"ing diodes may be implemented if desired, and their volt drop compensated for by implementing the upward adjust function of output voltage

Sync Input (Pin 16)

Pin 16 is the Sync Input. The 5080 hybrid operates at approximately 95 kHz and may be synchronized to frequencies from 95 to 105 kHz. The sync input pulse should meet the following levels as shown in the diagram. The sync input should sit at nominal 5 VDC and transition to ground level at a 10% ± 1% duty cycle. It should be noted that the internal oscillator runs at the switching frequency. Other frequencies are also available on special order. Contact MDI's Sales and Marketing Department for other sync frequencies.

Synchronizing the power conversion units within an extremely sensitive system ensures that any noise generation is coincident with the system clock.

If two or more 5080 units are used, a phase staggered sync signal may be applied in order to reduce the overall input and output ripple.

The "sync pin" should be left open if unused.

Typical Sync Waveform

Inhibit/BIT (Pin 17,18)

Pins 17and 18 are the BIT/Inhibit pins. The BIT signal is an analog signal that is the buffered output of the internal PWM error amplifier. The source impedance of the BIT line is approximately 50K ohms.

The normal voltage range of the BIT line is 0.9 VDC to 3.3 VDC. A voltage lower or higher than these values indicates that the internal regulating loop considers the output voltage to be too high or too low, respectively.

The BIT line may be connected to an external comparator window detector to produce a discrete BIT signal.

Pins 17 and 18 are also the Inhibit pins. To inhibit the output voltage, the inhibit input should be returned to the common ground pins, within 0.5 VDC. When the inhibit pin is connected to the common ground, the inhibit current is approximately 1 milliampere.

An open collector transistor may be used to actuate the inhibit. However, the inhibit pins may be safely connected to any positive voltage up to 16 VDC. Therefore, the inhibit pins may also be safely driven by standard 3.3 or 5 VDC logic devices.

When not inhibited, pins 17 and 18 should either be floating or returned to a voltage higher than 3.3 VDC.

Inhibit Circuits
Preferred Circuit Interface for Inhibit

Efficiency of 5080 POL Converters

Dual FET synchronous rectification and non-isolated design afford very high operating efficiencies for the 5080 series POL converters. Even very low operating voltages of 1. 2 VDC or less achieve typical efficiencies exceeding 77 percent, while models with outputs of 3.3 VDC and higher reach 88 percent or more. The characteristic curves below give graphic representation of typical efficiencies achieved as a function of load at 12 VDC input.

Some advice about protection of sensitive loads

The 5080 POL converters comprise a non-isolated circuit design; there is no inherent galvanic barrier that isolates the input bus from the output side of the converter. Under some circumstances of overstress or failure originating outside the converter, the converter itself may fail short circuit, effectively coupling input to output for some duration. Therefore, the user should assess the application risk to the loads under such conditions and make provisions to implement OVP, zener clamps or voltage suppression components as may be deemed necessary. Please contact the factory for assistance.

5080 Heat Removal and Mounting Recommendations

See MDI Application Notes on Recommended Mounting of Hybrids.

  Click here for a PDF version of this App Note.

  Have a question? Contact us today!

MDI's 5082 Point of Load Regulator

The 5082 series are radiation hardened, non-isolated, synchronous switching buck point of load (POL) regulators.

Non-isolated DC-DC converters are three terminal devices, having an input terminal, an output terminal and a common terminal.

Buck converters generate an output voltage that is lower than the input voltage.

In simplest form, the buck converter uses a FET, a diode and an inductor.

In order to obtain higher power efficiency, the rectifying diode in the non-isolated DC-DC converter is replaced with a second FET. The forward voltage drop of the diode is usually higher than the drop across the second FET, therefore power losses are lower. The FET must be switched in synchronism with the waveform that would appear across the diode. Therefore, DC-DC converters that use a second FET to perform the action of the diode are called synchronous rectification devices.

Simplified Block Diagram

The 5082 is a two-phase buck regulator. This means that there are two switching sections that are phase-staggered 180 degrees from each other. This effectively raises the input and output ripple frequency and reduces the amount of external ripple filtering that would otherwise be needed.

The block diagram of the model 5082 shows that input power is fed through a common mode inductor and applied to two power switch stages, each stage consisting of an upper switch and a lower switch. Each upper switch stage is driven at a 100 kHz rate by the pulse width modulator (PWM) circuit. However, due to the 180 degree phase staggering, the ripple is at 200 kHz.

Each switched waveform is then fed through it's own buck choke.

A lower switch on each power stage is connected in parallel with the output buck rectifier. The lower switch is connected between the upper switch output and ground.

The ripple filtered output passes through a common mode inductor to reduce output spike voltages. The external damping capacitor is supplied by the user to optimize load application and removal transients as well as to lower the output ripple.

The output voltage is passed through the output sense circuit, which permits voltage sensing directly at the 5082's output pins for best static load regulation.

Input pins are provided for external sync (this can also be used for phase staggering of multiple 5082's), an inhibit pin and a voltage adjust pin. Output pins include a 5 VDC voltage reference (for output voltage adjustment, a BIT analog output and a current telemetry output (useful in paralleling multiple converters).

Simplified Block Diagram

Input Voltage Source:

The 5082 converters are intended to operate from an intermediate bus. This intermediate bus is a voltage of 11 to 16 VDC (with a preferred voltage of 12 VDC) that is supplied by another, front-end power converter. The front-end power converter developing the intermediate bus is exposed to the bus variations and transients. Also, it is expected that the front-end converter will accommodate the MIL-STD-461 type EMI filtering requirements of the system, as applicable.

Although the 5082 converters do not contain full internal EMI filters, they do feature common mode filtering on input and output power lines. This provides a substantial reduction of voltage spikes.

A fully loaded 5082 module can draw up to 1000 mA ripple current at its switching frequency of 200 kHz. Therefore, any front end DC-DC converter should provide appropriate decoupling capacitance at it's output terminals to supply this maximum ripple current. A minimum input decoupling capacitance of 30 microfarads (ceramic MLC or low ESR types) per 5082 module is recommended.

For most applications, an input voltage source that is nominally 12 VDC will provide the best electrical performance. A nominal 15 VDC source may also be used, however, the conversion efficiencies will be slightly lower.

Output Voltage:

Output voltage types and adjustment ranges are shown on the 5082 data sheet.

Output Current:

Output current of the 5082 units is limited to 12 amperes or to the current produced at 20 watts output (considering the nominal output voltage), whichever is lower. The maximum output current is constant current limited.

External Output Capacitance:

Due to the small size of the 5082, the internal output capacitance is limited in value to that necessary for high frequency filtering. For good dynamic load transient response, the 5082 data sheet shows a recommended minimum and maximum external capacitance that should be supplied by the user or present in the user's load. The use of low ESR types, such as multiple solid Tantalum chips in parallel is encouraged, as ripple voltage will also be reduced.

Output Voltage Temperature Coefficients

Voltage limits for Model 5082 parts shown in the MDI data sheets are the nominal 25°C values. At temperatures outside 25°C, the output voltage may vary ± 100PPM/°C maximum with base temperature.

Output Ripple

Due to its small size, the internal capacitance of the 5082 is limited. For good load removal and load application response, a minimum value of external capacitance is recommended.

When selecting external capacitors, low ESR solid tantalum capacitors are preferred. Capacitor leads with excessive series inductance should not be used, since this will add impedance and negate the benefit of the external capacitance. Relatively large amounts of external capacitance may be added, but do not exceed the data sheet guidelines without consulting MDI.

Four Terminal Capacitor Method for Improved Filtering

To reduce high frequency spikes, multilayer ceramic capacitors in surface mount chip form can be used. For best results, the capacitor should be connected as a four terminal device (see illustration above). An external series common mode inductor or ferrite beads can also. be used between the converter and the capacitor.

Output Ripple Vs. Temperature

The fundamental output ripple of the 5082 converters is primarily dependent on the absolute capacitance value of the external output capacitors (when the output capacitors are multilayer ceramic types), or the ESR of the output capacitors (when the output capacitors are solid tantalum types). The selection of output capacitor depends on the output voltage and type of converter. However, the following effects occur at temperature. For units using ceramic output capacitors, the capacitance falls off sharply at high and low temperature extremes. Although the low ESR of ceramic capacitors results in very low ripple voltages, it is not unusual for ripple voltage to double at the high and low temperature extremes. For units using solid tantalum output capacitors, the ESR also rises sharply at low temperature extremes.

Therefore, users should conservatively assume a ripple temperature coefficient of 1% per °C increase over the 25°C base numbers.

Short Circuit and Overload Protection

Model 5082 DC-DC converters contain constant current limiting for protection against inadvertent output short circuits and overloads. The current limiting set point is approximately 125% of rated output current.

Output Over Voltage Protection

Model 5082 DC-DC converters do not contain any internal over voltage protection circuitry. If this function is required, the user should implement it externally. Because the 5082 is non-isolated, in the extremely unlikely event of a failed shorted switching FET, the input voltage could appear at the output pins. If warranted, external OVP should be used.

Output Load Transient response

The output load removal and load application transient voltage is a function of the external capacitance and the magnitude of the current step. The following table lists the magnitude of the output voltage transient for a 25% to 75% rated load change, with the minimum recommended external capacitance.

Back Voltage

A back voltage may be applied to the output of the 5082 DC-DC Converter, whether it be energized or de-energized. Up to 20% above the output voltage rating may be safely applied.

Pin Functions

Voltage Reference (Pin 7)

The voltage reference pin is primarily used for downward voltage adjustment of the output. However, it may also be used for other applications. Up to 2 milliamperes may be drawn by the user. This current, if drawn, reflects on the input current.

Output Voltage Adjustment (Pin 8)

The adjust pin function allows the user to set the 5082 output voltage slightly above or below it's initial set point. The recommended adjust range for each part type is listed in the data sheet.

When trimming for an increased output magnitude the adjust resistor is connected to the common ground. When trimming for a decreased output magnitude the adjust resistor is connected to the V ref pin (pin 13).

The adjust pin is connected to an internal 249K resistor, whose purpose is to prevent damage to the internal circuits and to reduce noise pickup.

The following table gives applicable resistor values for each 5082 type, as well as which equations to use to calculate the external adjust resistor value. For purposes of computing the external adjust resistor power dissipation, a maximum of 2.5 VDC appears across the external adjustment resistor.

If the external adjust feature is not used, both the adjust pin (8) and the V ref pin (7) should be left unconnected.

When the converter is adjusted upwards, the output power should be limited to 20 watts, or the output current should be limited to 10 amperes, whichever is less.

Equation 1A

Equation 1B

Equation 2A

Equation 2B

Equation 3

Output Current (Pin 9)

An analog of the output current is provided. This is useful for telemetry or in paralleling applications.

Model 5082 Pin 9 millivolts
per output ampere scaling

Sync Input (Pin 10)

Pin 10 is the Sync Input. The 5082 hybrid operates at approximately 100 kHz and may be synchronized to frequencies from 95 to 105 kHz. The sync input pulse should meet the following levels as shown in the diagram. The sync input should sit at nominal zero VDC and transition to +5 VDC at a 5% ± 1% duty cycle. It should be noted that the internal oscillator runs at the switching frequency. Other frequencies are also available on special order. Contact MDI's Sales and Marketing Department for other sync frequencies.

Synchronizing the power conversion units within an extremely sensitive system ensures that any noise generation is coincident with the system clock.

If two or more 5082 units are used, a phase staggered sync signal may be applied in order to reduce the overall input and output ripple. The "sync pin" should be left open if unused.

Typical Sync Waveform

BIT (Pin 11)

The BIT signal is an analog output that is nominally 0.5 VDC or less if the POL is in current limit and nominally 2.5 VDC during normal operation.

The BIT line may be connected to an external comparator window detector to produce a discrete BIT signal.

Inhibit (Pin 12)

Pin 12 is the Inhibit pin.

To inhibit the output voltage, the inhibit input should be connected to a positive voltage in excess of 1.2 VDC. The maximum inhibit voltage should be limited to 5.4 VDC. The impedance of the inhibit pin is approximately 7 Kohms.

Therefore, the inhibit pin may be safely driven by standard 3.3 or 5 VDC logic devices.

When not inhibited, pin 12 should either be left floating or returned to ground.

Efficiency of 5082 POL Converters

Dual FET synchronous rectification and non-isolated design afford very high operating efficiencies for the 5082 series POL converters. Even very low operating voltages of 1.2 VDC or less achieve typical efficiencies exceeding 75 percent, while models with outputs of 3.3 VDC and higher reach 82 percent or more. The characteristic curves below give graphic representation of typical efficiencies achieved as a function of load at 12 VDC input.

Some advice about protection of sensitive loads

The 5082 POL converters comprise a non-isolated circuit design; there is no inherent galvanic barrier that isolates the input bus from the output side of the converter. Under some circumstances of overstress or failure originating outside the converter, the converter itself may fail short circuit, effectively coupling input to output for some duration. Therefore, the user should assess the application risk to the loads under such conditions and make provisions to implement OVP, zener clamps or voltage suppression components as may be deemed necessary. Please contact the factory for assistance.

5082 Heat Removal and Mounting Recommendations

See MDI Application Notes on Recommended Mounting of Hybrids.

  Click here for a PDF version of this App Note.

  Have a question? Contact us today!

MDI's 5085 Point of Load Regulator

The 5085 series are radiation hardened, non-isolated, synchronous switching buck point of load (POL) regulators.

Non-isolated DC-DC converters are three terminal devices, having an input terminal, an output terminal and a common terminal.

Buck converters generate an output voltage that is lower than the input voltage.

In simplest form, the buck converter uses a FET, a diode and an inductor.

In order to obtain higher power efficiency, the rectifying diode in the non-isolated DC-DC converter is replaced with a second FET. The forward voltage drop of the diode is usually higher than the drop across the second FET, therefore power losses are lower. The FET must be switched in synchronism with the waveform that would appear across the diode. Therefore, DC-DC converters that use a second FET to perform the action of the diode are called synchronous rectification devices.

Simplified Block Diagram

The block diagram of the model 5085 shows that input power is applied to an upper power switch. The switch is driven at a 100 kHz rate by the pulse width modulator (PWM) circuit.

The switched waveform is then fed through the Buck choke.

A lower switch is connected in parallel with the output buck rectifier. The lower switch is connected between the upper switch output and ground.

The ripple filtered output passes through a common mode inductor to reduce output spike voltages. The external damping capacitor is supplied by the user to optimize load application and removal transients as well as to lower the output ripple.

The output voltage is passed through the output sense circuit, which permits voltage sensing directly at the 5085's output pins for best static load regulation.

A 5 VDC to 12 VDC boost circuit supplies high level drive signals for the 5085's switching FETs.

Input pins are provided for external sync (this can also be used for phase staggering of multiple 5085's), an inhibit pin and a voltage adjust pin. Output pins include a 5 VDC voltage reference (for output voltage adjustment), a BIT analog output and a current telemetry output (useful in paralleling multiple converters).

Simplified Block Diagram

Input Voltage Source:

The 5085 converters are intended to operate from a nominal 5 VDC bus and operate over the voltage range of 4.6 to 5.4 VDC.

Although the 5085 converters do not contain full internal EMI filters, they do feature common mode filtering on input and output power lines. This provides a substantial reduction of voltage spikes.

A fully loaded 5085 module can draw up to 1500 mA ripple current at its switching frequency of 100 kHz. Therefore, any front end DC-DC converter should provide appropriate decoupling capacitance at it's output terminals to supply this maximum ripple current. A minimum input decoupling capacitance of 30 microfarads (ceramic MLC or low ESR types) per 5085 module is recommended.

Output Voltage:

Output voltage types and adjustment ranges are shown on the 5085 data sheet.

Output Current:

Output current of the 5085 units is limited to 4 amperes or to the current produced at 10 watts output (considering the nominal output voltage), whichever is lower. The maximum output current is constant current limited. For higher output current, consider MDI model 5087.

External Output Capacitance:

Due to the small size of the 5085, the internal output capacitance is limited in value to that necessary for high frequency filtering. For good load transient response, the 5085 data sheet shows a recommended minimum and maximum external capacitance that should be supplied by the user or present in the user's load. The use of low ESR types, such as multiple solid Tantalum chips in parallel is encouraged, as ripple voltage will also be reduced.

Output Voltage Temperature Coefficients

Voltage limits for Model 5085 parts shown in the MDI data sheets are the nominal 25°C values. At temperatures outside 25°C, the output voltage may vary ± 100PPM/°C maximum with base temperature.

Output Ripple

Due to its small size, the internal capacitance of the 5085 is limited. For good load removal and load application response, a minimum value of external capacitance is recommended.

When selecting external capacitors, low ESR solid tantalum capacitors are preferred. Capacitor leads with excessive series inductance should not be used, since this will add impedance and negate the benefit of the external capacitance. Relatively large amounts of external capacitance may be added, but do not exceed the data sheet guidelines without consulting MDI.

Four Terminal Capacitor Method for Improved Filtering

To reduce high frequency spikes, multilayer ceramic capacitors in surface mount chip form can be used. For best results, the capacitor should be connected as a four terminal device (see illustration on previous page). An external series common mode inductor or ferrite beads can also be used between the converter and the capacitor.

Output Ripple Vs. Temperature

The fundamental output ripple of the 5085 converters is primarily dependent on the absolute capacitance value of the external output capacitors (when the output capacitors are multilayer ceramic types), or the ESR of the output capacitors (when the output capacitors are solid tantalum types). The selection of output capacitor depends on the output voltage and type of converter.

However, the following effects occur at temperature. For units using ceramic output capacitors, the capacitance falls off sharply at high and low temperature extremes. Although the low ESR of ceramic capacitors results in very low ripple voltages, it is not unusual for ripple voltage to double at the high and low temperature extremes. For units using solid tantalum output capacitors, the ESR also rises sharply at low temperature extremes.

Therefore, users should conservatively assume a ripple temperature coefficient of 1% per °C increase over the 25°C base numbers.

Short Circuit and Overload Protection

Model 5085 DC-DC converters contain constant current limiting for protection against inadvertent output short circuits and overloads. The current limiting set point is approximately 125% of rated output current.

Output Over Voltage Protection

Model 5085 DC-DC converters do not contain any internal over voltage protection circuitry. If this function is required, the user should implement it externally. Because the 5085 is non-isolated, in the extremely unlikely event of a failed shorted switching FET, the input voltage could appear at the output pins. If warranted, external OVP should be used.

Output Load Transient response

The output load removal and load application transient voltage is a function of the external capacitance and the magnitude of the current step. The following table lists the magnitude of the output voltage transient for a 25% to 75% rated load change, with the minimum recommended external capacitance.

Back Voltage

A back voltage may be applied to the output of the 5085 DC-DC Converter, whether it be energized or de-energized. Up to 20% above the output voltage rating may be safely applied.

Pin Functions

Voltage Reference (Pin 7)

The voltage reference pin is primarily used for downward voltage adjustment of the output. However, it may also be used for other applications. Up to 10 milliamperes may be drawn by the user. This current, if used, is ultimately drawn from the input voltage.

Output Voltage Adjustment (Pin 8)

The adjust pin function (pin 8) allows the user to set the 5085 output voltage slightly above or below it's initial set point. The recommended adjust range for each part type is listed in the data sheet.

When trimming for an increased output magnitude the adjust resistor is connected to the common ground. When trimming for a decreased output magnitude the adjust resistor is connected to the V ref pin (pin 7).

The adjust pin is connected to an internal 10K resistor, whose purpose is to prevent damage to the internal circuits and to reduce noise pickup.

The following table gives applicable resistor values for each 5085 type, as well as which equations to use to calculate the external adjust resistor value. For purposes of computing the external adjust resistor power dissipation, a maximum of 2.5 VDC appears across the external adjustment resistor.

If the external adjust feature is not used, both the adjust pin (8) and the V ref pin (7) should be left unconnected.

When the converter is adjusted upwards, the output power should be limited to 10 watts, or the output current should be limited to 4 amperes, whichever is less.

Equation 1A

Equation 1B

Equation 2A

Equation 2B

Equation 3

Output Current (Pin 9)

An analog of the output current is provided in pin 9. This is useful in paralleling applications.

Model 5085 Pin 9 millivolts
per output ampere scaling

Sync Input (Pin 10)

Pin 10 is the Sync Input. The 5085 hybrid operates at approximately 95 kHz and may be synchronized to frequencies from 95 to 105 kHz. The sync input pulse should meet the following levels as shown in the diagram. The sync input should sit at nominal 5 VDC and transition to ground level at a 10% ± 1% duty cycle. It should be noted that the internal oscillator runs at the switching frequency. Other frequencies are also available on special order. Contact MDI's Sales and Marketing Department for other sync frequencies.

Synchronizing the power conversion units within an extremely sensitive system ensures that any noise generation is coincident with the system clock.

If two or more 5085 units are used, a phase staggered sync signal may be applied in order to reduce the overall input and output ripple. The "sync pin" should be left open if unused.

Typical Sync Waveform

Inhibit/BIT (Pin 11,12)

Pins 11 and 12 are the BIT/Inhibit pins.

The BIT signal is an analog signal that is the buffered output of the internal PWM error amplifier. The source impedance of the BIT line is approximately 50K ohms.

The normal voltage range of the BIT line is 0.9 VDC to 3.3 VDC. A voltage lower or higher than these values indicates that the internal regulating loop considers the output voltage to be too high or too low, respectively

The BIT line may be connected to an external comparator window detector to produce a discrete BIT signal.

Pin 12 is also the Inhibit pin. To inhibit the output voltage, the inhibit input should be connected to the input/output return (pin 3) to within 0.5 VDC. When so connected, the current through the pin is approximately 100 microamperes. An open collector transistor may be used to actuate the inhibit as shown below.

Preferred Circuit Interface for Inhibit

Efficiency of 5085 POL Converters

Dual FET synchronous rectification and non-isolated design afford very high operating efficiencies for the 5085 series POL converters. Even very low operating voltages of 1.2 VDC or less achieve typical efficiencies exceeding 78 percent, while models with outputs of 3.3 VDC and higher reach 90 percent or more. The characteristic curves below give graphic representation of typical efficiencies achieved as a function of load at 5 VDC input.

Some advice about protection of sensitive loads

The 5085 POL converters comprise a non-isolated circuit design; there is no inherent galvanic barrier that isolates the input bus from the output side of the converter. Under some circumstances of overstress or failure originating outside the converter, the converter itself may fail short circuit, effectively coupling input to output for some duration. Therefore, the user should assess the application risk to the loads under such conditions and make provisions to implement OVP, zener clamps or voltage suppression components as may be deemed necessary. Please contact the factory for assistance.

5085 Heat Removal and Mounting Recommendations

See MDI Application Notes on Recommended Mounting of Hybrids.

  Click here for a PDF version of this App Note.

  Have a question? Contact us today!

MDI's 5087 Point of Load Regulator

The 5087 series are radiation hardened, non-isolated, synchronous switching buck point of load (POL) regulators.

Non-isolated DC-DC converters are three terminal devices, having an input terminal, an output terminal and a common terminal.

Buck converters generate an output voltage that is lower than the input voltage.

In simplest form, the buck converter uses a FET, a diode and an inductor.

In order to obtain higher power efficiency, the rectifying diode in the non-isolated DC-DC converter is replaced with a second FET. The forward voltage drop of the diode is usually higher than the drop across the second FET, therefore power losses are lower. The FET must be switched in synchronism with the waveform that would appear across the diode. Therefore, DC-DC converters that use a second FET to perform the action of the diode are called synchronous rectification devices.

Simplified Block Diagram

The 5087 is a two phase buck regulator. This means that there are two switching sections that are phase-staggered 180 degrees from each other. This effectively raises the input and output ripple frequency and reduces the amount of external ripple filtering that would otherwise be needed.

The block diagram of the model 5087 shows that input power is fed through a common mode inductor and applied to two power switch stages, each stage consisting of an upper switch and a lower switch. Each upper switch stage is driven at a 100 kHz rate by the pulse width modulator (PWM) circuit. However, due to the 180 degree phase staggering, the ripple is at 200 kHz.

Each switched waveform is then fed through it's own Buck choke.

A lower switch on each power stage is connected in parallel with the output buck rectifier. The lower switch is connected between the upper switch output and ground.

The ripple filtered output passes through a common mode inductor to reduce output spike voltages. The external damping capacitor is supplied by the user to optimize load application and removal transients as well as to lower the output ripple.

The output voltage is passed through the output sense circuit, which permits voltage sensing directly at the 5087's output pins for best static load regulation.

A 5 VDC to 12 VDC boost circuit supplies high level drive signals for the 5087's switching FETs.

Input pins are provided for external sync (this can also be used for phase staggering of multiple 5087's), an inhibit pin and a voltage adjust pin. Output pins include a 5 VDC voltage reference (for output voltage adjustment, a BIT analog output and a current telemetry output (useful in paralleling multiple converters).

Simplified Block Diagram

Input Voltage Source:

The 5087 converters are intended to operate from a nominal 5 VDC bus. This 5 VDC may have a range of 4.6 to 5.4 VDC.

Although the 5087 converters do not contain full internal EMI filters, they do feature common mode filtering on input and output power lines. This provides a substantial reduction of voltage spikes.

A fully loaded 5087 module can draw up to 2000 mA ripple current at its switching frequency of 200 kHz. Therefore, any front end DC-DC converter should provide appropriate decoupling capacitance at it's output terminals to supply this maximum ripple current. A minimum input decoupling capacitance of 60 microfarads (ceramic MLC or low ESR types) per 5087 module is recommended.

Output Voltage:

Output voltage types and adjustment ranges are shown on the 5087 data sheet.

Output Current:

Output current of the 5087 units is limited to 12 amperes or to the current produced at 20 watts output (considering the nominal output voltage), whichever is lower. The maximum output current is constant current limited.

External Output Capacitance:

Due to the small size of the 5087, the internal output capacitance is limited in value to that necessary for high frequency filtering. For good dynamic load transient response, the 5087 data sheet shows a recommended minimum and maximum external capacitance that should be supplied by the user or present in the user's load. The use of low ESR types, such as multiple solid Tantalum chips in parallel is encouraged, as ripple voltage will also be reduced.

Output Voltage Temperature Coefficients

Voltage limits for Model 5087 parts shown in the MDI data sheets are the nominal 25°C values. At temperatures outside 25°C, the output voltage may vary ± 100PPM/°C maximum with base temperature.

Output Ripple

Due to its small size, the internal capacitance of the 5087 is limited. For good load removal and load application response, a minimum value of external capacitance is recommended.

When selecting external capacitors, low ESR solid tantalum capacitors are preferred. Capacitor leads with excessive series inductance should not be used, since this will add impedance and negate the benefit of the external capacitance. Relatively large amounts of external capacitance may be added, but do not exceed the data sheet guidelines without consulting MDI.

Four Terminal Capacitor Method for Improved Filtering

To reduce high frequency spikes, multilayer ceramic capacitors in surface mount chip form can be used. For best results, the capacitor should be connected as a four terminal device. An external series common mode inductor or ferrite beads can also be used between the converter and the capacitor.

Output Ripple Vs. Temperature

The fundamental output ripple of the 5087 converters is primarily dependent on the absolute capacitance value of the external output capacitors (when the output capacitors are multilayer ceramic types), or the ESR of the output capacitors (when the output capacitors are solid tantalum types). The selection of output capacitor depends on the output voltage and type of converter. However, the following effects occur at temperature. For units using ceramic output capacitors, the capacitance falls off sharply at high and low temperature extremes. Although the low ESR of ceramic capacitors results in very low ripple voltages, it is not unusual for ripple voltage to double at the high and low temperature extremes. For units using solid tantalum output capacitors, the ESR also rises sharply at low temperature extremes.

Therefore, users should conservatively assume a ripple temperature coefficient of 1% per °C increase over the 25°C base numbers.

Short Circuit and Overload Protection

Model 5087 DC-DC converters contain constant current limiting for protection against inadvertent output short circuits and overloads. The current limiting set point is approximately 125% of rated output current.

Output Over Voltage Protection

Model 5087 DC-DC converters do not contain any internal over voltage protection circuitry. If this function is required, the user should implement it externally. Because the 5087 is non-isolated, in the extremely unlikely event of a failed shorted switching FET, the input voltage could appear at the output pins. If warranted, external OVP should be used.

Output Load Transient response

The output load removal and load application transient voltage is a function of the external capacitance and the magnitude of the current step. The following table lists the magnitude of the output voltage transient for a 25% to 75% rated load change, with the minimum recommended external capacitance.

Back Voltage

A back voltage may be applied to the output of the 5087 DC-DC Converter, whether it be energized or de-energized. Up to 20% above the output voltage rating may be safely applied.

Pin Functions

Voltage Reference (Pin 7)

The voltage reference pin is primarily used for downward voltage adjustment of the output. However, it may also be used for other applications. Up to 2 milliamperes may be drawn by the user. This current, if drawn, reflects on the input current.

Output Voltage Adjustment (Pin 8)

The adjust pin function allows the user to set the 5087 output voltage slightly above or below it's initial set point. The recommended adjust range for each part type is listed in the data sheet.

When trimming for an increased output magnitude the adjust resistor is connected to the common ground. When trimming for a decreased output magnitude the adjust resistor is connected to the V ref pin (pin 7).

The adjust pin is connected to an internal 10K resistor, whose purpose is to prevent damage to the internal circuits and to reduce noise pickup.

The following table gives applicable resistor values for each 5087 type, as well as which equations to use to calculate the external adjust resistor value. For purposes of computing the external adjust resistor power dissipation, a maximum of 2.5 VDC appears across the external adjustment resistor.

If the external adjust feature is not used, both the adjust pin (8) and the V ref pin (7) should be left unconnected.

When the converter is adjusted upwards, the output power should be limited to 20 watts, or the output current should be limited to 12 amperes, whichever is lower.

Equation 1A

Equation 1B

Equation 2A

Equation 2B

Equation 3

Output Current (Pin 9)

An analog of the output current is provided. This is useful for telemetry or in paralleling applications.

Model 5087 Pin 9 millivolts
per output ampere scaling

Sync Input (Pin 10)

Pin 10 is the Sync Input. The 5087 hybrid operates at approximately 100 kHz and may be synchronized to frequencies from 95 to 105 kHz. The sync input pulse should meet the following levels as shown in the diagram. The sync input should sit at nominal zero VDC and transition to +5 VDC at a 5% ± 1% duty cycle. It should be noted that the internal oscillator runs at the switching frequency. Other frequencies are also available on special order. Contact MDI's Sales and Marketing Department for other sync frequencies.

Synchronizing the power conversion units within an extremely sensitive system ensures that any noise generation is coincident with the system clock.

If two or more 5087 units are used, a phase staggered sync signal may be applied in order to reduce the overall input and output ripple. The "sync pin" should be left open if unused.

Typical Sync Waveform

Remote Sense (Pin 11)

Remote sense can recover up to 10% line drop is the positive leg. Connect the remote sense pin at the remote regulation point. If remote sense is not used, connect to the positive output or leave disconnected.

Inhibit (Pin 12)

Pin 12 is the Inhibit pin.

To inhibit the output voltage, the inhibit input should be connected to a positive voltage in excess of 1.2 VDC. The maximum inhibit voltage should be limited to 5.4 VDC. The impedance of the inhibit pin is approximately 7 Kohms.

Therefore, the inhibit pin may be safely driven by standard 3.3 or 5 VDC logic devices.

When not inhibited, pin 12 should either be left floating or returned to ground.

Efficiency of 5087 POL Converters

Dual FET synchronous rectification and non-isolated design afford very high operating efficiencies for the 5087 series POL converters. Even very low operating voltages of 1.2 VDC or less achieve typical efficiencies exceeding 81 percent. The characteristic curves below give graphic representation of typical efficiencies achieved as a function of load at 5 VDC input.

Some advice about protection of sensitive loads

The 5087 POL converters comprise a non-isolated circuit design; there is no inherent galvanic barrier that isolates the input bus from the output side of the converter. Under some circumstances of overstress or failure originating outside the converter, the converter itself may fail short circuit, effectively coupling input to output for some duration. Therefore, the user should assess the application risk to the loads under such conditions and make provisions to implement OVP, zener clamps or voltage suppression components as may be deemed necessary. Please contact the factory for assistance.

5087 Heat Removal and Mounting Recommendations

See MDI Application Notes on Recommended Mounting of Hybrids.

  Click here for a PDF version of this App Note.

  Have a question? Contact us today!

MDI's *3635 Programmable Inrush Limiter Application Notes

Model 73635 Inrush Limiter
Application Notes

The 73635 series comprises single channel normally open, radiation hardened, positive leg, non-isolated, current limited inrush limiters using MDI's patented 100K+™ technology. These parts are intended to control the power input and inrush current when series connected ahead of downstream DC-DC converters, which typically have relatively high values of input capacitance.

This series has four variations for input voltage. Model numbers are prefixed with a 5, 7, 8 or 9 denoting 28, 50, 70 and 100 VDC nominal input variants respectively. They coordinate with all popular satellite bus voltages and harmonize with MDI's comprehensive line of 100K+™ Proton Rad Hard DC-DC converters. The information in this application note that references model 73635 applies to all models in the series.

The 73635 has two types of inputs: the power bus input, and an inhibit input. Similarly, there are two types of outputs: the power bus output and the inhibit output. The inputs and outputs are sequenced to first provide initial power application and then inhibit the downstream converters on.

When the inhibit input to the 73635 is un-asserted, the power bus output is inhibited and the inhibit output is un-asserted. When the inhibit input of the 73635 is released, the power bus output turns on, at a limited current. The inhibit output remains un-asserted during the turn on interval until the output power bus is fully saturated at which time it changes state. This function allows the downstream DC-DC converters to be sequenced by the inrush limiter so that the converters are not released from inhibit until their input capacitors are charged and the power bus has reached steady state values.

Referring to the block diagram, a nominal 15VDC bias voltage is developed relative to the positive input rail.

This bias voltage powers a constant current error amplifier. The input signal for the error amp is derived from a precision shunt on the output of the inrush limiter. The limit is factory set to 4 amperes, but a provision is afforded the user to adjust it via an external trim resistor. The current gain of the amplifier is largely invariant over line, load, temperature, radiation and life.

An undervoltage lockout is provided so that the output will not start until the lower limit of input voltage range is reached. This ensures that the bus is within operating range before downstream converters begin drawing current. A slight hysteresis is built in to prevent chatter.

An inhibit interlock is provided for downstream converters so that they remain inhibited OFF until the inrush to their input capacitors is completed. This reduces current surges and minimizes dissipation in the inrush limiter FET, itself fully saturated before downstream converts begin active switching. The error signal of the constant current amplifier is level shifted to ground as the FET achieves saturation, releasing the clamp on the open collector inhibit output transistor.

An important feature of the 73635 inrush limiters is their user selectable output current limit via external resistor. The resistor should be connected between the Rext pin and either power input pin. With the external resistor open, the output current limit is the tabulated value. With a 4K external resistor, the current limit is reduced to 50% of the tabulated value. This feature permits peak output current to be tailored to application requirements and user preference.

Superior stress derating is achieved by close coupling the Inrush Limiter FET to an intrinsic thermal mass. The energy pulse to charge capacitive loads, described as 1/2CV2 divided by the time constant, can create significant thermal dissipation in the FET. Close thermal coupling to the intrinsic mass integrates the temperature rise effects in the FET caused by transient power dissipation.

Simplified Block Diagram

Pin Functions

Pin 8 is the Input Inhibit pin; pin 9 is the common return

To inhibit the output voltage, the inhibit input should be connected to the common ground pins, within 0.5 VDC. When the inhibit pin is connected to the common ground, the inhibit current is approximately 100 microamperes.

An open collector transistor may be used to actuate the input inhibit.

Connect pin 9 to input return.

Input Inhibit Circuit
Preferred Circuit Interface for Input Inhibit

Pin 10 is the Output Inhibit pin

Pin 10 is connected to the downstream converter(s) inhibit not input pin. Pin 10 asserts the converters on after the inrush interval is complete and the power bus has reached steady state range.

Pins 17 and 18 are the Input pins to the 73635 Inrush Limiter
Pins 13 and 14 are the Output pins

The FET switch in the 73635 is polarized and the positive input pins should be connected to the positive external circuit point. A body diode is internally connected in the reverse direction. The current rating of the body diode is the same as the switch current rating.

Pin 12 is Rext

Connecting a resistor between pin 12 and pin 17 or 18 limits the output current of the inrush limiter. As much as 4K ohms may be added for a 50 percent reduction in tabulated values of output current. This function permits the user to program the current limit and thus, the output rise time into any given capacitive load.

73635 Ratings:

The 73635 inrush limiter ratings and characteristics are as described in the table below;

  • Application Bus Voltage in the commonly available satellite bus voltage ranges. These ratings harmonize with the input voltage ranges for MDI 5000, 7000, 8000 and 9000 series converters
  • Maximum Recommended Input Voltage is the maximum factory recommendation considering single event radiation effects
  • Absolute Maximum Input Range - No damage
  • Current Limit - Maximum limit current
  • Undervoltage Lockout - minimum nominal value
  • Initial On Time - Typical values, via Inhibit Input release
  • Leakage Current at Max Recommended Input Voltage OFF State - Typical values
  • Volt Drop - Maximum values at limit current
  • Quiescent Current at Nominal Input - Typical values, input inhibited

Power Dissipation:

Total steady state power dissipation of the model 73635 package is limited to 4 watts.

Turn on Time with External Load Capacitance

Turning on into a capacitance causes an inrush current. However, the controlled output current of the model 73635 limits this inrush current. The turn on time will depend on the output load capacitance and the rated output current of the 73635, as adjusted by the external current program resistor (if used).

Short Circuit and Overload Protection

Model 73635 inrush limiters provide constant current limiting for protection against inadvertent output short circuits and overloads. However, the duration of the short circuit or overload should be limited by thermal constraints.

73635 Heat Removal and Mounting Recommendations

See MDI Application Notes on Recommended Mounting of Hybrids.

Part Numbering System

The model 73635 part numbering system is similar to that used with MDI DC-DC converters For example:

73635 SE-TF

73635 = Model number for a 50 VDC nominal Inrush Limiter

SE = Grade (available as EU, R, S, RE and SE)

TF = Seam welded chassis mount package with flange (also available in D and case style 1 packages)

Specifications

Static Characteristics:

  • Voltage Drop: See Table Above
  • I limit max: See Table Above
  • V input: See Table Above
  • Leakage current at Voff: See Table Above
  • Quiescent Bias Current: 15 mA typical
  • Inhibit Input Circuit Current: 1 mA typical at 5 VDC
  • Control Trip Point: 1.5 VDC nominal
  • Inhibit Output: Drives up to 4 MDI DC-DC Converters
  • Isolation, All pins to Case 500 VDC
  • Operating temperature Range? -55°C to 85°C (R or S) or 125°C (RE or SE)
  • Storage temperature Range? -65°C to 150°C
  • Steady State Power Dissipation? 4 watts
  • Total Ionizing Dose? 100K+™
  • SEE 82MeV*cm2/mg

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MDI's *3646 Mag-Latch Inrush Limiter Application Notes

Model 73646 Programmable Mag-Latch
Inrush Limiter Application Notes

The 73646 series are single channel SPST normally open, radiation hardened, positive leg, pulse controlled, current limited inrush limiters using MDI's patented 100K+™ technology. They are intended to control the power input and inrush current to downstream DC-DC converters, which typically have relatively high values of input capacitance. The control input is in the configuration of a mag-latch relay.

The on/off control function is magnetically isolated from the bus voltage. The inrush limiter is normally in the OFF or open mode. It is commanded ON (closed) by a short pulse applied to the LATCH terminals and OFF by a pulse applied to the UNLATCH terminals. In this way, the control function has the same action as a dual coil magnetically latched relay.

This series has four variations for input voltage. Model numbers are prefixed with a 5, 7, 8 or 9 denoting 28, 50, 70 and 100 VDC nominal input variants respectively. They coordinate with all popular satellite bus voltages and harmonize with MDI's comprehensive line of 100K+™Proton Rad Hard DC-DC converters. The information in this application note that references model 73646 applies to all models in the series.

In addition to the magnetically isolated latch/unlatch inputs, the 73646 has two types of inputs referenced to the input bus return: the power bus input, and an inhibit input. Similarly, there are two types of outputs referenced to the input return: the power bus output and the inhibit output. The inputs and outputs are sequenced to first provide controlled initial power application and then inhibit the downstream converters on.

When the inhibit input to the 73646 is un-asserted, the power bus output is inhibited and the inhibit output is un-asserted. When the inhibit input of the 73646 is released, the power bus output turns on, at a limited current. The inhibit output remains un-asserted during the turn on interval until the output power bus is fully saturated at which time it changes state. This function allows the downstream DC-DC converters to be sequenced by the inrush limiter so that the converters are not released from inhibit until their input capacitors are charged and the power bus has reached steady state values. The inhibit is left open (unconnected) if unused; sequencing as above will occur with a Latch command pulse.

Referring to the block diagram, a nominal 15VDC bias voltage is developed relative to the positive input rail.

This bias voltage powers a constant current error amplifier. The input signal for the error amp is derived from a precision shunt on the output of the inrush limiter. The limit is factory set to 4 amperes, but a provision is afforded the user to adjust it via an external trim resistor. The current gain of the amplifier is largely invariant over line, load, temperature, radiation and life.

An undervoltage lockout is provided so that the output will not start until the lower limit of input voltage is reached. This ensures that the bus is within operating range before downstream converters begin drawing current. A slight hysteresis is built in to prevent chatter.

An inhibit interlock is provided for downstream converters so that they remain inhibited OFF until the inrush to their input capacitors is completed. This reduces current surges and minimizes dissipation in the inrush limiter FET, itself fully saturated before downstream converts begin active switching. The error signal of the constant current amplifier is level shifted to ground as the FET achieves saturation, releasing the clamp on the open collector inhibit output transistor.

"Coil" voltage pulses of between 4 and 18 VDC are applied to the Latch ON and Unlatch OFF terminals to command the output and inhibit interlock signal. These ports are magnetically isolated from the input, input return and each other and feed the bistable latching circuit. A failsafe power on reset function always commands the output OFF (Open) with input power removal and reapplication. The "coil" current required is 20 mA typical and a pulse width of 50 mSec is recommended. Activate/deactivate delay is typically 3 mSec.

An important feature of the 73646 inrush limiters is their user selectable output current limit via external resistor. The resistor should be connected between the Rext pin and either power input pin. With the external resistor open, the output current limit is the tabulated value. With a 4K external resistor, the current limit is reduced to 50% of the tabulated value. This feature permits peak output current to be tailored to application requirements and user preference.

Superior stress derating is achieved by close coupling the Inrush Limiter FET to an intrinsic thermal mass. The energy pulse to charge capacitive loads, described as 1/2CV2 divided by the time constant, can create significant thermal dissipation in the FET. Close thermal coupling to the intrinsic mass integrates the temperature rise effects in the FET caused by transient power dissipation.

Simplified Block Diagram

Pin Functions

Pin Function

Pins 1 and 2 provide Latch ON function to close the switch section. A pulse of between 4 and 18 VDC, 20 mA, 50 mSec. duration is applied, positive to pin 1 and return to pin 2.

Pins 4 and 5 provide Latch OFF function to open the switch section. A pulse of between 4 and 18 VDC, 20 mA, 50 mSec. duration is applied, positive to pin 4 and return to pin 5.

Pin 6 is isolated case.

Pin 7 is the Output Inhibit pin and is connected to the inhibit not inputs of the downstream converter(s). Pin 7 asserts the converters on after the inrush interval is complete and the power bus has reached steady state range. Up to four MDI converters may be connected and controlled.

Pin 8 is the Input Inhibit pin; pin 9 is the common return.
To inhibit the output voltage, the inhibit input should be connected to the common ground pins, within 0.5 VDC. When the inhibit pin is connected to the common ground, the inhibit current is approximately 100 microamperes.
An open collector transistor may be used to actuate the input inhibit.
Connect pin 9 to input return.
Pin 8 is to be left open (unconnected) if the function is not used.

Input Inhibit Circuit
Preferred Circuit Interface for Input Inhibit

Pins 12 is Input + and 11 is the Output + pin

The FET switch in the 73646 is polarized and the positive input pins should be connected to the positive external circuit point. A body diode is internally connected in the reverse direction. The current rating of the body diode is the same as the switch current rating.

Pin 10 is Rext

Connecting a resistor between pin 10 and pin 12 limits the output current of the inrush limiter. As much as 4K ohms may be added for a 50 percent reduction in tabulated values of output current. This function permits the user to program the current limit and thus, the output rise time into any given capacitive load.

73646 Ratings:

The 73646 mag-latch inrush limiter ratings and characteristics are as described in the table below;

Power Dissipation:

Total steady state power dissipation of the model 73646 package is limited to 8 watts.

Turn on Time with External Load Capacitance

Turning on into a capacitance causes an inrush current. However, the controlled output current of the model 73646 limits this inrush current. The turn on time will depend on the output load capacitance and the rated output current of the 73646, as adjusted (if any) by the external current program resistor.

Short Circuit and Overload Protection

Model 73646 inrush limiters provide constant current limiting for protection against inadvertent output short circuits and overloads. However, the duration of the short circuit or overload should be limited by thermal constraints.

73646 Heat Removal and Mounting Recommendations

See MDI Application Notes on Recommended Mounting of Hybrids.

Part Numbering System

The model 73646 part numbering system is similar to that used with MDI DC-DC converters. For example:

73646 SE-UF

73646 = Model number for a 50 VDC nominal Inrush Limiter

SE = Grade (available as EU, R, S, RE and SE)

WF = Case Style 8: Seam welded chassis mount package with flange (also available in case styles 2, 3, 5, 6 and 12).

Specifications

  • Voltage Drop: See Table Above
  • I limit max: See Table Above
  • V input: See Table Above
  • Leakage current at Voff: See Table Above
  • Quiescent Bias Current: 15 mA typical
  • Inhibit Input Circuit Current: 1 mA typical at 5 VDC
  • Control Trip Point: 1.5 VDC nominal
  • Inhibit Output: Drives up to 4 MDI DC-DC Converters
  • "Coil" Voltage: 4< V< 18
  • "Coil" Current: 20 mA typical
  • Recommended Pulse width: 50 mS
  • Delay to activate/ deactivate: 3 mS typical
  • Isolation, All pins to Case: 500 VDC
  • Isolation "latch" to "unlatch" coils: 500 VDC
  • Isolation "latch" or "unlatch" coils to bus input or return: 500 VDC
  • Operating temperature Range: -55°C to 85°C (R or S) or 125°C (RE or SE)
  • Storage temperature Range: -65°C to 150°C
  • Steady State Power Dissipation: 8 watts
  • Total Ionizing Dose: 100K+™
  • SEE 82MeV*cm2/mg

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MDI's *3647 Solid State Relay Application Notes

The 53647 series are single channel, SPST normally open, radiation hardened, magnetically isolated control, solid-state FET relays (SSRs) using MDI's patented 100K+™ technology. For superior radiation tolerance, no optical couplers are used.

This series has four variations for input voltage. Model numbers are prefixed with a 5, 7, 8 or 9 denoting 28, 50, 70 and 100 VDC nominal input variants respectively. They coordinate with all popular satellite bus voltages and harmonize with MDI's comprehensive line of 100K+™ Proton Rad Hard DC-DC converters. The SSRs excel in standalone applications as well. The information in this application note that references model 53647 applies to all models in the series.

The 53647 has two types of command inputs; a nominal 5 VDC bias supply input, and a low current logic level input compatible with both 3.3 and 5 VDC logic. The SSR may be commanded by one or both inputs, making circuit implementation readily achievable without additional components. The isolated FET output (normally open) closes when commanded by the input.

Superior stress derating is achieved by close coupling the SSR FET to an intrinsic thermal mass. The energy pulse to charge capacitive loads, described as 1/2CV2 divided by the time constant, can create significant thermal dissipation in the FET. Close thermal coupling to the intrinsic mass integrates the temperature rise effects in the FET caused by transient power dissipation.

Another feature unique to the 53647 SSR is programmable turn on time. By connecting an external capacitor between the Cext pin and either output pin, the user may control the output turn on ramp from nominally 50 through 400 uS, effectively tailoring the rate of rise of output current. The function, which is essentially constant over temperature, life and radiation, is particularly useful in controlling inrush current effects of capacitive loads.

As shown in the block diagram, an internal RF oscillator supplies transformer-coupled gate drive to the FET switch. The oscillator is powered by the Vdd input (pin 9). The SSR is commanded on (closed) by bringing the buffered command input (pin 7) to a logic "high". In this configuration, pin 8 is the common return of pins 7 and 9. If the logic level input is not desired, the switch can be commanded on by applying only the Vdd input. In this configuration, the buffered command logic level input is strapped to the Vdd input terminal (pin 7 wired to pin 9).

Simplified Block Diagram

Pin Functions

Vdd Input

Vdd input bias power is applied positive on pin 9 and the return on pin 8.

Vdd powers an internal RF oscillator that supplies gate drive to the FET. A DC voltage in the range of 4.6 VDC to 5.4 VDC is suitable. The current drawn by the bias input is approximately 30 mA.

On special order, the 53467 SSR is available with a 3.3 VDC nominal Vdd voltage.

CMD Control Input:

There are two ways to close (turn on) the 53467 SSR.

One way is to connect the buffered command input pin (pin 7) to the Vdd pin (pin 9). Opening the connection opens the SSR (turn-off).

The second way is to bring the buffered command input (pin 7) to a logic high. The SSR is turned off when pin 7 is a logic low. The buffered command pin 7 is dual input; either 3.3 or 5 volt logic inputs may be used. The nominal control trip point is 1.5 VDC such that CMD OFF is 1 VDC maximum and CMD ON is 2 VDC minimum.

Pin 7 draws approximately 1 mA when connected to a 5 VDC source.

Cext:

Output turn-on rise time may be user programmed via an externally mounted capacitor connected between Cext (pin 16) and either of the output (pins 14,15). Output rise time will increase linearly from 50 to 400 uSecs. as the capacitance increases from zero (none connected) to 2000 pF. The voltage rating of the capacitor should at least equal the maximum voltage rating of the SSR.

Switch Ratings:

The 53467 Solid State Relays are available with different voltage ratings, as shown in the ratings table. The models are arranged by satellite application bus voltage to coordinate with MDI's 100K+™ Proton Rad Hard DC-DC converter inputs. The maximum input voltage is the recommended maximum for other applications.

The FET switch in the 53467 is polarized and the positive input pins should be connected to the positive external circuit point. A body diode is internally connected in the reverse direction. The current rating of the body diode is the same as the switch current rating.

53467 SSRs may be paralleled for increased current capability or lower voltage drop at any given current. Two 53467 SSRs may also be used in series for redundancy.

AC waveforms within the rating of the switch may be controlled by placing two switch sections back-to-back.

Switch parameters are given in the tables.

TABLE 1: SSR Ratings and Static Characteristics

  • Application Bus Voltage in the commonly available satellite bus voltage ranges. These ratings harmonize with the input voltage ranges for MDI 5000, 7000, 8000 and 9000 series converters.
  • Maximum Recommended Input Voltage is the maximum factory recommendation considering single event radiation effects
  • Maximum Rated Input Voltage is the maximum Vds rating of the FET switch
  • Peak Current - Maximum transient current
  • Steady State Current - Maximum continuous steady state current
  • On Resistance - Typicals in ohms, 25°C. Increases linearly to 2X at 125°C.
  • Leakage Current at Max Rated Input Voltage OFF State - Typical values
  • Leakage Current at Application Bus Voltage OFF State - Typical values

TABLE 2: SSR Dynamic Response, Pre-Radiation, 25°C, Nominal values

TABLE 3: SSR Dynamic Response, Post 100K Radiation, 25°C, Nominal values

Power Dissipation:

Total continuous steady state power dissipation of the model 53467 package is limited to 4 watts.

Switching External Load Capacitance

Turning on into a capacitance causes an inrush current. However, the controlled turn on time feature of the model 53467 SSR limits this inrush current. For transient turn on conditions the rated steady state current of the switch may be increased by 100%. The on-off repetition rate should not be more frequent than 25 mSecs.

Output Switch Temperature Coefficients

Switch section resistances are shown at 25 degrees C case temperature. As the case temperature rises, switch resistance increases. The temperature coefficient of this increase is approximately 0.4 percent per degree C. At case temperatures below 25°C, the resistance decreases by the same coefficient.

Short Circuit and Overload Protection

Similar to mechanical relays, Model 53467 solid-state relays do not contain current limiting for protection against inadvertent output short circuits and overloads. Current limiting, if required, must be externally provided by the user.

53467 Heat Removal and Mounting Recommendations

See MDI Application Notes on Recommended Mounting of Hybrids.

Part Numbering System

The model 53467 part numbering system is coordinated with that used for MDI DC-DC converters. For example:

53647SE-TF

53647= Model number for a 28 VDC bus input SSR

SE= Grade (available as EU, R, RE, S and SE)

TF= Seam welded chassis mount package with flange (also available in D and case style 1 packages)

Features

  • SPST NO configuration, single channel
  • Close coupled intrinsic thermal mass
  • User programmable output rise time
  • Dual logic level command input
  • Patented 100K+™ Proton Rad Hard Technology
  • No optocouplers used

Specifications

  • SSR Ratings and Static Characteristics:
  • Input Voltage: See Table 1 Above
  • R on: See Table 1 Above
  • I max: See Table 1 Above
  • Leakage current, Off state: See Table 1 Above
  • SSR Dynamic Response Characteristics:
  • Rise Time: See Table 2 Above
  • Fall Time: See Table 2 Above
  • Delay Time: See Table 2 Above
  • Radiation Life: See Table 3 Above
  • Vdd Bias Voltage - 5 VDC nominal (4.60 VDC <=Vdd=> 5.4 VDC)
  • Vdd Bias Current 30 mA typical
  • Buffer Command Input Current - 1 mA typical at 5 VDC
  • Control Trip Point - 1.5 VDC nominal (OFF 1V max., ON 2V min.)
  • Isolation: Pins to Case 500 VDC
  • Isolation: Switch to Vdd Bias Supply 500 VDC
  • Pin 4 is Case
  • Operating Temperature Range: -55°C to 85°C (R or S) or 125°C (RE or SE)
  • Storage Temperature Range: -65°C to 150°C
  • Steady State Power Dissipation - 4 watts
  • Total Ionizing Dose - 100K+™
  • SEE - 82MeV*cm2/mg
  • Weight - 45g Typical

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MDI's *3649 Bus Master Application Notes

The 73649 series comprises dual input SPDT normally open, radiation hardened, current limited solid state relay/inrush limiters using MDI's patented 100K+™ technology. These parts enable user selection of redundant satellite buses as well as control the power input and inrush current when series connected ahead of downstream DC-DC converters, which have relatively high values of input capacitance.

This series has four variations for input voltage. Model numbers are prefixed with a 5, 7, 8 or 9 denoting 28, 50, 70 and 100 VDC nominal input variants respectively. They coordinate with all popular satellite bus voltages and harmonize with MDI's comprehensive line of 100K+™ Proton Rad Hard DC-DC converters. The information in this application note that references model 73649 applies to all models in the series.

The Bus Master hybrid microcircuit is designed to simplify the implementation of redundant power systems in satellite applications. Standard functions include:

  • Ability to select power from one or both satellite power buses using a logic level command
  • Inrush Current Limiting at turn on
  • Ground Referenced Current Telemetry
  • Undervoltage Lockout
  • Series Redundant FET Switches

The *3649 Bus Master simplifies satellite system electrical design by combining the features of a solid state relay, inrush current limiter and turn-on sequencer to provide: 1) user selection of redundant satellite power buses via logic command; 2) limiting inrush currents to the capacitive inputs of downstream dc-dc converters; and 3) sequencing the active turn-on of those converters via an inhibit signal until their input voltage has achieved steady state value and the inrush interval is complete. Significant reliability gains are thereby achieved.

Operation

The functional block shows two identical constant current inrush limiting power stages. Each power stage, fed from its respective power bus, comprises two series connected FETs close coupled to a thermal mass. The thermal mass integrates the impulse of power dissipation during an inrush current and minimizes the FET's temperature rise.

Solid State Relay – Power Bus Selection

The power section is controlled by independent under voltage lockouts, which prevent the power stage from activating unless a minimum power bus voltage level is present. When either individual power bus voltage exceeds the under voltage minimum, that individual bus may be selected on by grounding the appropriate command pin.

Inrush Current Limiter

The FETs are followed by a current shunt, then connected to the output terminal. Using the shunt resistor signal, the FET drive is the pass stage of a constant current limiter. The un-adjusted constant current is preset to compliment the nominal bus voltage, but may be externally adjusted to a lower value by the user to tailor the output rise time. The output current magnitude, as measured across the shunt resistor, is translated to the input ground level, where it provides a current telemetry signal.

Turn-On Sequencer

In addition to the two identical power circuits, there is a common control circuit. This common circuitry includes a combined inhibit, which can override both bus turn on commands, as well as serves as an inhibit release for downstream DC-DC converters. The inhibit output release allows downstream DC-DC converters to go active only after either of the two bus switches has completed its turn on and inrush limit phase.

Table 1

Functional Description

CMD_A, CMD_B

When de-energized, these pins are pulled up to a nominal 10 VDC level. When one pin is grounded, the commanded bus is selected. When both pins are grounded, both buses are connected to the output and to each other. The nominal threshold voltage for actuation is 2.5 VDC and the nominal short circuit current for these pins is 400 microamperes.

TLM_A, TLM_B

A short circuit protected, ground referenced telemetry signal is produced at these pins. The output impedance of the telemetry pins is approximately 1K. The scaling of bus current to open circuit output current is listed in Table 1.

INH_OUT

When the output is in current limit due to limiting an inrush current from either BUS_A or BUS_B (or current drawn from the output in excess of the current limit setting), this pin goes low. In typical applications, the inhibit pins of down stream DC-DC converters in a system are connected to the INH_OUT pin, preventing the downstream DC-DC converters from drawing load current during the inrush limit interval.

This pin is an open collector rated at 80 VDC open circuit and 15 mA short circuit.

ADJ_A, ADJ_B

These pins are used to reduce the constant current limit of power drawn from their respective power buses by adding a resistor from the ADJ pin to its respective power bus. Connecting a 4K resistor from the adjust pin to its adjacent output reduces the nominal current limit by 50%.

BUS_A, BUS_B

These are the power input pins to the device. At least one power bus must be present and above the under voltage lockout limit (listed in Table 1) for the part to function.

Each bus input connects to the output through a pair of back to back FETs, providing failure redundancy.

If both buses are selected, the bus input terminals will be connected to each other through the device.

OUT

The common output pin. The voltage drop from the selected input to the output, at maximum current prior to limit, is shown in Table 1.

*3649 Pin Schedule

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MDI's *3678 Hybrid EMI Filter Application Notes

MDI's *3678 series of EMI filters are designed to "up-rev" DC-DC converters with built in MIL-STD-461C EMI filters to MIL-STD-461D, E, F, G requirements. They connect between + Input and Input RTN of the converter and the power source. One MDI *3678 can filter multiple DC-DC converters up to the *3678 current rating.

Model *3678 is a compact, low attenuation solution that allows users of DC-DC converters with internal MIL-STD-461C CE03 filters to meet MIL-STD-461D, E, F, G CE102 requirements. *3678 filters incorporate a common mode stage and two low attenuation, low resonance differential filters. This design minimizes the possibility of excessive input filter impedance that might otherwise result in DC-DC converter loop instability (e.g. Middlebrook effects).

*3678 Product Family Selection Guide

Typical Insertion Loss - Common Mode

Typical Insertion Loss - Differential Mode

Specification Ratings

The nominal input voltage is the common terminology for the input bus; input voltage ranges are expressed to demonstrate that internal components have derating to support low voltage (max. current stress) and high voltage (max. voltage stress) for safe operation. The internal components of the *3678 filters are fully derated to support stated operation up to grade level baseplate operating temperature without further derating the filter module.

In many cases, input voltages other than those shown can be supported. Consult the factory if you need to broaden applications ratings.

Current Rating

Current ratings shown are DC values up to continuous steady state maximum ratings listed to the baseplate temperature for the grade level selected.

Power Dissipation (Pd) Ratings

Internal losses express the Pd rating of the device when operated at maximum currents and voltages listed. Pd in watts is dissipated exclusively by conduction to the filter baseplate and into the system heatsink.

Connecting the *3678 EMI filters

Good connection wiring practice will help maximize electro-magnetic compatibility with other system components:

  • Dress filter input and return lines close to each other to reduce radiated emissions. Twisting leads is helpful.
  • Dress filter output and return lines close to each other to reduce radiated emissions. Twisting leads is helpful.
  • If possible, route conductors close to the system ground plane (in most cases, system chassis)
  • Reduce coupling:
    • Keep LINE side and LOAD side conductors physically apart
    • Keep power and control signal conductors separated
    • Consider shielded conductors if necessary
    • Connect the chassis pin of *3678 EMI filter to a good chassis ground using a short, low inductance lead

Where:

  • LINE pins connect to the source power + and RTN
  • LOAD pins connect to the DC-DC converter(s) + and RTN
  • Chassis pin connects to the source GND and to the DC-DC converter(s) chassis pin(s)

Parallel Connections for Higher Current Ratings

*3678 EMI Filters may be connected in parallel to gain higher overall current ratings; this is particularly useful in systems where multiple DC-DC converters are powered from the same input. Identical model *3678 filters must be selected and interconnecting wiring should be arranged to allow the filters to share the load current equally (e.g. interconnecting conductor circular/square mils should be as equal as practical on both the LINE and LOAD sides among the number of *3678 filters used). In such cases we recommend each filter be derated 10 percent for inevitable conductor imbalances.

Grade Levels Available:

Blank = Industrial Grade Unit – Full power output from -55°C to +85°C case temp, linearly derates to zero at 115°C; 24 hour burn-in, 25°C test data only.
EU = Engineering Unit – Full power output from -55°C to +85°C case temp, linearly derates to zero at 115°C; 24 hour burn-in, 25°C test data only.
M = Military hardware with full power output from -55°C to +85°C case temp, linearly derates to zero at 115°C; 160 hour burn-in, -55°C, +25°C and +85°C test data.
E = Military hardware with full power output from -55°C to +125°C case temp, linearly derates to zero at 135°C; 160 hour burn-in, -55°C, +25°C and +125°C test data.
L = Space hardware 45 kRad with full power output from -55°C to +85°C case temp, linearly derates to zero at 115°C; 160 hour burn-in, -55°C, +25°C and +85°C test data.
LE = Space hardware 45 kRad with full power output from -55°C to +125°C case temp, linearly derates to zero at 135°C; 160 hour burn-in, -55°C, +25°C and +125°C test data.
S = Space hardware 100 kRad with full power output from -55°C to +85°C case temp, linearly derates to zero at 115°C; 320 hour burn-in, -55°C, +25°C and +85°C test data.
SE = Space hardware 100 kRad with full power output from -55°C to +125°C case temp, linearly derates to zero at 135°C; 320 hour burn-in, -55°C, +25°C and +125°C test data.

Case Styles

       

 

 

 

 

See MDI Application Notes on Recommended Mounting of Hybrids.

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