53649

28 VDC Rad Hard BUS MASTER Hybrid Module

3-in-1 solution for system design

Features

  • RadHard TID >100kRad(Si)
  • 2:1 Margin: Operates beyond 200kRad TID
  • No SEE: LET > 82meV*cm^2/mg
  • Proton Resistant: No optocouplers used
  • Allows user selection and application of input from redundant power busses via logic level command

Specifications

  • Input: 28 VDC to VDC
  • Input Range (Continuous): 18 VDC to 50 VDC
  • Command Input: 1.5 VDC to VDC
  • Storage Temp: -65 °C to +150 °C
  • Weight: 50 gms typical to gms typical

Environment

    • Grade EU:
      • Full Output Power at Tcase = 85°C
      • Minimum Output Power at Tcase = -55°C
        • Linearly derates to zero at Tcase = 115

      • TID up to kRad(Si)
      • No SEE up to 60MeV*cm2/mg

    • Grade L:
      • Full Output Power at Tcase = 85°C
      • Minimum Output Power at Tcase = -55°C
        • Linearly derates to zero at Tcase = 115

      • TID up to 45kRad(Si)
      • No SEE up to 60MeV*cm2/mg

    • Grade LE:
      • Full Output Power at Tcase = 125°C
      • Minimum Output Power at Tcase = -55°C
        • Linearly derates to zero at Tcase = 135

      • TID up to 45kRad(Si)
      • No SEE up to 60MeV*cm2/mg

    • Grade S:
      • Full Output Power at Tcase = 85°C
      • Minimum Output Power at Tcase = -55°C
        • Linearly derates to zero at Tcase = 115

      • TID up to 100kRad(Si)
      • No SEE up to 60MeV*cm2/mg

    • Grade SE:
      • Full Output Power at Tcase = 125°C
      • Minimum Output Power at Tcase = -55°C
        • Linearly derates to zero at Tcase = 135

      • TID up to 100kRad(Si)
      • No SEE up to 60MeV*cm2/mg

Additional Notes

The *3649 Bus Master simplifies satellite system electrical design by combining the features of a solid state relay, inrush current limiter and turn on sequencer to provide: User selection of redundant satellite power buses via logic command AND limiting inrush currents to the capacitive inputs of downstream DC-DC converters AND sequencing the active turn-on of those convers via an inhibit signal until their input voltage has achieved steady state value and the inrush internal is complete. Significant reliability gains are thereby achieved.

Operation

The functional block diagram shows two identical switch and telemetry stages, followed by a constant current inrush limiting power stages. Each power stage, fed from its selected power bus, comprises a FETs close coupled to the baseplate thermal mass. The thermal mass integrates the impulse of power dissipation during an inrush current and minimizes the FETs temperature rise.

Solid State Relay

The power section is controlled by an under voltage lockout, which prevents the power stage from activation unless a minimum power bus voltage is present. When either individual power bus voltage exceeds the under voltage minimum, that individual bus may be selected on by grounding the appropriate command pin.

Inrush Current Limiter

The FET is followed by a current shunt, then connected to the output terminal. Using the shunt resistor signal, the FET drive is the pass stage of a constant current limiter. The unadjusted constant current is preset to compliment the nominal bus voltage, but may be externally adjusted to a lower value by the user to tailor the output rise time. The output current magnitude, as measured across the shunt resistor, is translate to the input ground level, where it provides a current telemetry signal.

Turn-On Sequencer

In addition to the two identical bus switch and current telemetry, there is a common control constant current circuit. The inhibit output release allows downstream DC-DC converters to go active only after either of the t wo bus switches has completed its turn on and inrush limit phase.