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Product Series: 53802

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53802

600V / 20A Form B contacts (Normally Closed) Hybrid Solid State Relay

Rad Hard 100K+ TID

Features

High Voltage / Low Resistance
Single Pole Single Throw (SPST).
Wide Band Gap semiconductors for low resistance
Magnetically coupled command for fast response
Selectable Continuous or Mag Latch function
Rugged Hermetic Package
No Optocouplers
Logic Level Drive
RadHard TID >100kRad(Si)
No SEE: LET > 82meV*cm^2/mg

Specifications

Bias Input Voltage: 4.7 VDC to 5.3 VDC
Bias Input Current: 30 mA to 50 mA
Command Input: 1.0 mA
Isolation Input to Output: 1000 VDC
All pins to case isolation: 1000 VDC
Power Dissipation: W to 10 W
Storage Temp: -65 °C to +150 °C
Shock: 50 G's
Vibration: 30 G's
Acceleration: 500 G's
Weight: 32 gms typical

Environment

Grade EU:
Full Output Power at Tcase = 85°C
Minimum Output Power at Tcase = -55°C
Linearly derates to zero at Tcase = 115
TID up to kRad(Si)
No SEE up to 60MeV*cm2/mg
Grade L:
Full Output Power at Tcase = 85°C
Minimum Output Power at Tcase = -55°C
Linearly derates to zero at Tcase = 115
TID up to 45kRad(Si)
No SEE up to 60MeV*cm2/mg
Grade LE:
Full Output Power at Tcase = 125°C
Minimum Output Power at Tcase = -55°C
Linearly derates to zero at Tcase = 135
TID up to 45kRad(Si)
No SEE up to 60MeV*cm2/mg
Grade S:
Full Output Power at Tcase = 85°C
Minimum Output Power at Tcase = -55°C
Linearly derates to zero at Tcase = 115
TID up to 100kRad(Si)
No SEE up to 60MeV*cm2/mg
Grade SE:
Full Output Power at Tcase = 125°C
Minimum Output Power at Tcase = -55°C
Linearly derates to zero at Tcase = 135
TID up to 100kRad(Si)
No SEE up to 60MeV*cm2/mg

Additional Notes

Uses a wide bandgap power semiconductor for high performance.

Magnetically coupled

User configured for continuous or pulse latching

For continuous operation: Connect +5VDC bais from pin 1 (Case style 18,19) pins 4/5 (Case style 20) to bias ground pin 2 (Case style 18, 19) pins 6/7 (Case style 20).

Ground pin 3 (Case style 18, 19) pin 9 (Case style 20) to energize the SSR.

For Latch operation leave pin 3 ( Case style 18,19) pin 9 (Case style 20) open, connect +5VDC bias from pin 1 (Case style 18, 19) pins 4/5 (Case style 20) to bias ground pin 2 (Cast style 18, 19) pins 6/7 (Case style 20)

To energize apply +5VDC pulse, 25 usec minimum to pin 5 (Case style 18, 19) pin 11 (Case Style 20).

To De-energize apply +5VDC pulse, 25 usec minimum to pin 4 (Case style 18, 19) pin 11 (Case Style 20).

Power Dissipation: Total steady state power dissipation is limited to 10 watts provided the baseplate temperature is limited to the rated temperature.